1,276 research outputs found

    Techniques for low power analog, digital and mixed signal CMOS integrated circuit design

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    With the continuously expanding of market for portable devices such as wireless communication devices, portable computers, consumer electronics and implantable medical devices, low power is becoming increasingly important in integrated circuits. The low power design can increase operation time and/or utilize a smaller size and lighter-weight battery. In this dissertation, several low power complementary metal-oxide-semiconductor (CMOS) integrated circuit design techniques are investigated. A metal-oxide-semiconductor field effect transistor (MOSFET) can be operated at a lower voltage by forward-biasing the source-substrate junction. This approach has been investigated in detail and used to designing an ultra-low power CMOS operational amplifier for operation at ± 0.4 V. The issue of CMOS latchup and noise has been investigated in detail because of the forward biasing of the substrates of MOSFETs in CMOS. With increasing forward body-bias, the leakage current increases significantly. Dynamic threshold MOSFET (DTMOS) technique is proposed to overcome the drawback which is inherent in a forward-biased MOSFET. By using the DTMOS method with the forward source-body biased MOSFET, two low-power low-voltage CMOS VLSI circuits that of a CMOS analog multiplexer and a Schmitt trigger circuits are designed. In this dissertation, an adaptive body-bias technique is proposed. Adaptive body-bias voltage is generated for several operational frequencies. Another issue, which the chip design community is facing, is the development of portable, cost effective and low power supply voltage. This dissertation proposes a new cost-effective DC/DC converter design in standard 1.5 um n-well CMOS, which adopts a delay-line controller for voltage regulation

    Topics in Analysis and Design of Primary Parallel Isolated Boost Converter

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    High Efficiency Reversible Fuel Cell Power Converter

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    Power electronic interfaces for piezoelectric energy harvesters

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    Motion-driven energy harvesters can replace batteries in low power wireless sensors, however selection of the optimal type of transducer for a given situation is difficult as the performance of the complete system must be taken into account in the optimisation. In this thesis, a complete piezoelectric energy harvester system model including a piezoelectric transducer, a power conditioning circuit, and a battery, is presented allowing for the first time a complete optimisation of such a system to be performed. Combined with previous work on modelling an electrostatic energy harvesting system, a comparison of the two transduction methods was performed. The results at 100 Hz indicate that for small MEMS devices at low accelerations, electrostatic harvesting systems outperform piezoelectric but the opposite is true as the size and acceleration increases. Thus the transducer type which achieves the best power density in an energy harvesting system for a given size, acceleration and operating frequency can be chosen. For resonant vibrational energy harvesting, piezoelectric transducers have received a lot of attention due to their MEMS manufacturing compatibility with research focused on the transduction method but less attention has been paid to the output power electronics. Detailed design considerations for a piezoelectric harvester interface circuit, known as single-supply pre-biasing (SSPB), are developed which experimentally demonstrate the circuit outperforming the next best known interface's theoretical limit. A new mode of operation for the SSPB circuit is developed which improves the power generation performance when the piezoelectric material properties have degraded. A solution for tracking the maximum power point as the excitation changes is also presented.Open Acces

    Direct usage of photovoltaic solar panels to supply a freezer motor with variable DC input voltage

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    In this paper, a single-phase photovoltaic (PV) inverter fed by a boost converter to supply a freezer motor with variable DC input is investigated. The proposed circuit has two stages. Firstly, the DC output of the PV panel that varies between 150 and 300 V will be applied to the boost converter. The boost converter will boost the input voltage to a fixed 300 V DC. Next, this voltage is supplied to the single-phase full-bridge inverter to obtain 230 V AC. In the end, The output of the inverter will feed a freezer motor. The PV panels can be stand-alone or grid-connected. The grid-connected PV is divided into two categories, such as with a transformer and without a transformer, a transformer type has galvanic isolation resulting in increasing the security and also provides no further DC current toward the grid, but it is expensive, heavy and bulky. The transformerless type holds high efficiency and it is cheaper, but it suffers from leakage current between PV and the grid. This paper proposes a stand-alone direct use of PV to supply a freezer; therefore, no grid connection will result in no leakage current between the PV and Grid. The proposed circuit has some features such as no filtering circuit at the output of the inverter, no battery in the system, DC-link instead of AC link that reduces no-loads, having a higher efficiency, and holding enough energy in the DC-link capacitor to get the motor started. The circuit uses no transformers, thus, it is cheaper and has a smaller size. In addition, the system does not require a complex pulse width modulation (PWM) technique, because the motor can operate with a pulsed waveform. The control strategy uses the PWM signal with the desired timing. With this type of square wave, the harmonics (5th and 7th) of the voltage are reduced. The experimental and simulation results are presented to verify the feasibility of the proposed strategy

    Product assurance technology for custom LSI/VLSI electronics

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    The technology for obtaining custom integrated circuits from CMOS-bulk silicon foundries using a universal set of layout rules is presented. The technical efforts were guided by the requirement to develop a 3 micron CMOS test chip for the Combined Release and Radiation Effects Satellite (CRRES). This chip contains both analog and digital circuits. The development employed all the elements required to obtain custom circuits from silicon foundries, including circuit design, foundry interfacing, circuit test, and circuit qualification
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