121 research outputs found

    Embedded system for real-time digital processing of medical Ultrasound Doppler signals

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    Ultrasound (US) Doppler systems are routinely used for the diagnosis of cardiovascular diseases. Depending on the application, either single tone bursts or more complex waveforms are periodically transmitted throughout a piezoelectric transducer towards the region of interest. Extraction of Doppler information from echoes backscattered from moving blood cells typically involves coherent demodulation and matched filtering of the received signal, followed by a suitable processing module. In this paper, we present an embedded Doppler US system which has been designed as open research platform, programmable according to a variety of strategies in both transmission and reception. By suitably sharing the processing tasks between a state-of-the-art FGPA and a DSP, the system can be used in several medical US applications. As reference examples, the detection of microemboli in cerebral circulation and the measurement of wall _distension_ in carotid arteries are finally presented

    Dynamic hashing technique for bandwidth reduction in image transmission

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    Hash functions are widely used in secure communication systems by generating the message digests for detection of unauthorized changes in the files. Encrypted hashed message or digital signature is used in many applications like authentication to ensure data integrity. It is almost impossible to ensure authentic messages when sending over large bandwidth in highly accessible network especially on insecure channels. Two issues that required to be addressed are the large size of hashed message and high bandwidth. A collaborative approach between encoded hash message and steganography provides a highly secure hidden data. The aim of the research is to propose a new method for producing a dynamic and smaller encoded hash message with reduced bandwidth. The encoded hash message is embedded into an image as a stego-image to avoid additional file and consequently the bandwidth is reduced. The receiver extracts the encoded hash and dynamic hashed message from the received file at the same time. If decoding encrypted hash by public key and hashed message from the original file matches the received file, it is considered as authentic. In enhancing the robustness of the hashed message, we compressed or encoded it or performed both operations before embedding the hashed data into the image. The proposed algorithm had achieved the lowest dynamic size (1 KB) with no fix length of the original file compared to MD5, SHA-1 and SHA-2 hash algorithms. The robustness of hashed message was tested against the substitution, replacement and collision attacks to check whether or not there is any detection of the same message in the output. The results show that the probability of the existence of the same hashed message in the output is closed to 0% compared to the MD5 and SHA algorithms. Amongst the benefits of this proposed algorithm is computational efficiency, and for messages with the sizes less than 1600 bytes, the hashed file reduced the original file up to 8.51%

    GME: GPU-based Microarchitectural Extensions to Accelerate Homomorphic Encryption

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    Fully Homomorphic Encryption (FHE) enables the processing of encrypted data without decrypting it. FHE has garnered significant attention over the past decade as it supports secure outsourcing of data processing to remote cloud services. Despite its promise of strong data privacy and security guarantees, FHE introduces a slowdown of up to five orders of magnitude as compared to the same computation using plaintext data. This overhead is presently a major barrier to the commercial adoption of FHE. In this work, we leverage GPUs to accelerate FHE, capitalizing on a well-established GPU ecosystem available in the cloud. We propose GME, which combines three key microarchitectural extensions along with a compile-time optimization to the current AMD CDNA GPU architecture. First, GME integrates a lightweight on-chip compute unit (CU)-side hierarchical interconnect to retain ciphertext in cache across FHE kernels, thus eliminating redundant memory transactions. Second, to tackle compute bottlenecks, GME introduces special MOD-units that provide native custom hardware support for modular reduction operations, one of the most commonly executed sets of operations in FHE. Third, by integrating the MOD-unit with our novel pipelined 6464-bit integer arithmetic cores (WMAC-units), GME further accelerates FHE workloads by 19%19\%. Finally, we propose a Locality-Aware Block Scheduler (LABS) that exploits the temporal locality available in FHE primitive blocks. Incorporating these microarchitectural features and compiler optimizations, we create a synergistic approach achieving average speedups of 796Ă—796\times, 14.2Ă—14.2\times, and 2.3Ă—2.3\times over Intel Xeon CPU, NVIDIA V100 GPU, and Xilinx FPGA implementations, respectively

    Recent Advances in Signal Processing

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    The signal processing task is a very critical issue in the majority of new technological inventions and challenges in a variety of applications in both science and engineering fields. Classical signal processing techniques have largely worked with mathematical models that are linear, local, stationary, and Gaussian. They have always favored closed-form tractability over real-world accuracy. These constraints were imposed by the lack of powerful computing tools. During the last few decades, signal processing theories, developments, and applications have matured rapidly and now include tools from many areas of mathematics, computer science, physics, and engineering. This book is targeted primarily toward both students and researchers who want to be exposed to a wide variety of signal processing techniques and algorithms. It includes 27 chapters that can be categorized into five different areas depending on the application at hand. These five categories are ordered to address image processing, speech processing, communication systems, time-series analysis, and educational packages respectively. The book has the advantage of providing a collection of applications that are completely independent and self-contained; thus, the interested reader can choose any chapter and skip to another without losing continuity

    Lossless and low-cost integer-based lifting wavelet transform

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    Discrete wavelet transform (DWT) is a powerful tool for analyzing real-time signals, including aperiodic, irregular, noisy, and transient data, because of its capability to explore signals in both the frequency- and time-domain in different resolutions. For this reason, they are used extensively in a wide number of applications in image and signal processing. Despite the wide usage, the implementation of the wavelet transform is usually lossy or computationally complex, and it requires expensive hardware. However, in many applications, such as medical diagnosis, reversible data-hiding, and critical satellite data, lossless implementation of the wavelet transform is desirable. It is also important to have more hardware-friendly implementations due to its recent inclusion in signal processing modules in system-on-chips (SoCs). To address the need, this research work provides a generalized implementation of a wavelet transform using an integer-based lifting method to produce lossless and low-cost architecture while maintaining the performance close to the original wavelets. In order to achieve a general implementation method for all orthogonal and biorthogonal wavelets, the Daubechies wavelet family has been utilized at first since it is one of the most widely used wavelets and based on a systematic method of construction of compact support orthogonal wavelets. Though the first two phases of this work are for Daubechies wavelets, they can be generalized in order to apply to other wavelets as well. Subsequently, some techniques used in the primary works have been adopted and the critical issues for achieving general lossless implementation have solved to propose a general lossless method. The research work presented here can be divided into several phases. In the first phase, low-cost architectures of the Daubechies-4 (D4) and Daubechies-6 (D6) wavelets have been derived by applying the integer-polynomial mapping. A lifting architecture has been used which reduces the cost by a half compared to the conventional convolution-based approach. The application of integer-polynomial mapping (IPM) of the polynomial filter coefficient with a floating-point value further decreases the complexity and reduces the loss in signal reconstruction. Also, the “resource sharing” between lifting steps results in a further reduction in implementation costs and near-lossless data reconstruction. In the second phase, a completely lossless or error-free architecture has been proposed for the Daubechies-8 (D8) wavelet. Several lifting variants have been derived for the same wavelet, the integer mapping has been applied, and the best variant is determined in terms of performance, using entropy and transform coding gain. Then a theory has been derived regarding the impact of scaling steps on the transform coding gain (GT). The approach results in the lowest cost lossless architecture of the D8 in the literature, to the best of our knowledge. The proposed approach may be applied to other orthogonal wavelets, including biorthogonal ones to achieve higher performance. In the final phase, a general algorithm has been proposed to implement the original filter coefficients expressed by a polyphase matrix into a more efficient lifting structure. This is done by using modified factorization, so that the factorized polyphase matrix does not include the lossy scaling step like the conventional lifting method. This general technique has been applied on some widely used orthogonal and biorthogonal wavelets and its advantages have been discussed. Since the discrete wavelet transform is used in a vast number of applications, the proposed algorithms can be utilized in those cases to achieve lossless, low-cost, and hardware-friendly architectures

    Quantification and segmentation of breast cancer diagnosis: efficient hardware accelerator approach

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    The mammography image eccentric area is the breast density percentage measurement. The technical challenge of quantification in radiology leads to misinterpretation in screening. Data feedback from society, institutional, and industry shows that quantification and segmentation frameworks have rapidly become the primary methodologies for structuring and interpreting mammogram digital images. Segmentation clustering algorithms have setbacks on overlapping clusters, proportion, and multidimensional scaling to map and leverage the data. In combination, mammogram quantification creates a long-standing focus area. The algorithm proposed must reduce complexity and target data points distributed in iterative, and boost cluster centroid merged into a single updating process to evade the large storage requirement. The mammogram database's initial test segment is critical for evaluating performance and determining the Area Under the Curve (AUC) to alias with medical policy. In addition, a new image clustering algorithm anticipates the need for largescale serial and parallel processing. There is no solution on the market, and it is necessary to implement communication protocols between devices. Exploiting and targeting utilization hardware tasks will further extend the prospect of improvement in the cluster. Benchmarking their resources and performance is required. Finally, the medical imperatives cluster was objectively validated using qualitative and quantitative inspection. The proposed method should overcome the technical challenges that radiologists face

    Digital semaphore: technical feasibility of QR code optical signaling for fleet communications

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    In recent decades, optical LOS communications such as flag semaphore or flashing light have atrophied to the point where, if they are required, U.S. Naval forces are at a distinct disadvantage. RF communications have become critical to nearly all operations, but this capability comes at the cost of disclosing the location of operations. Depending on the platform, these RF communications can become a critical vulnerability. EMCON attempts to minimize this vulnerability through the elimination of any RF emissions from a ship, but communication requirements in recent years have essentially prevented a complete suppression of RF emissions. This work proposes mitigating emissions vulnerability by utilizing a new method of optical communications at LOS visual ranges reminiscent of flag semaphore. Tactical QR code communications streaming digital data through optical signaling has the potential to provide tactical communications at a moderate range, allowing critical communications to be relayed to and from off-ship platforms. Additional technological advances can be used to overcome current range, security, reliability, and throughput barriers. This project demonstrates how a combination of essential technical capabilities can be used to establish a QR code communications system as a potentially useful approach for tactical operations.http://archive.org/details/digitalsemaphore1094534699Outstanding ThesisLieutenant Commander, United States NavyApproved for public release; distribution is unlimited

    Implementation of an Improved Image Enhancement Algorithm on FPGA

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    Image processing plays very crucial role in this digital human world and has rapidly evolved with the development of computers, mathematics and the real-life demand of variety of applications in wide range of areas. This wide range of areas includes remote sensing, machine/ robot vision, pattern recognition, medical diagnosis, video processing, military, agriculture, television, etc. Image processing has two important components which are image enhancement and information extraction. Since image enhancement works at the front end with the initial raw inputs, it works like a backbone in image processing. When it comes to implementing these image enhancement techniques and developing applications, these tasks are bit demanding in the choice of processing units because the demand of high resolution. This emerges the necessity of a high speed, powerful and cost-effective processing unit. In this thesis we present an improved image enhancement algorithm in terms of performance and its implementation on FPGA as they satiates the necessity of high speed, powerful and cost-effective processing unit by providing flexibility, parallelization, pipelining and reconfigurability. We have performed a high level synthesis by using MATLAB and implemented an improved image enhancement algorithm on Cyclone V by using Quartus Prime. We have considered an X-ray image size of 1000x1920p for implementation and achieved decent PSNR values and hardware resource utilization along with the better visual interpretability by our proposed improvements. For achieving a better execution time and power consumption we also offer the task parallelism for the algorithm
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