Nonlinear Design Technique for High-Power Switching-Mode Oscillators

A simple nonlinear technique for the design of high-efficiency and high-power switching-mode oscillators is presented. It combines existing quasi-nonlinear methods and the use of an auxiliary generator (AG) in harmonic balance. The AG enables the oscillator optimization to achieve high output power and dc-to-RF conversion efficiency without affecting the oscillation frequency. It also imposes a sufficient drive on the transistor to enable the switching-mode operation with high efficiency. Using this AG, constant-power and constant-efficiency contour plots are traced in order to determine the optimum element values. The oscillation startup condition and the steady-state stability are analyzed with the pole-zero identification technique. The influence of the gate bias on the output power, efficiency, and stability is also investigated. A class-E oscillator is demonstrated using the proposed technique. The oscillator exhibits 75 W with 67% efficiency at 410 MHz

Fully integrated CMOS power amplifier design using the distributed active-transformer architecture

A novel on-chip impedance matching and power-combining method, the distributed active transformer is presented. It combines several low-voltage push-pull amplifiers efficiently with their outputs in series to produce a larger output power while maintaining a 50-Ω match. It also uses virtual ac grounds and magnetic couplings extensively to eliminate the need for any off-chip component, such as tuned bonding wires or external inductors. Furthermore, it desensitizes the operation of the amplifier to the inductance of bonding wires making the design more reproducible. To demonstrate the feasibility of this concept, a 2.4-GHz 2-W 2-V truly fully integrated power amplifier with 50-Ω input and output matching has been fabricated using 0.35-μm CMOS transistors. It achieves a power added efficiency (PAE) of 41 % at this power level. It can also produce 450 mW using a 1-V supply. Harmonic suppression is 64 dBc or better. This new topology makes possible a truly fully integrated watt-level gigahertz range low-voltage CMOS power amplifier for the first time

Distributed active transformer - a new power-combining andimpedance-transformation technique

In this paper, we compare the performance of the newly introduced distributed active transformer (DAT) structure to that of conventional on-chip impedance-transformations methods. Their fundamental power-efficiency limitations in the design of high-power fully integrated amplifiers in standard silicon process technologies are analyzed. The DAT is demonstrated to be an efficient impedance-transformation and power-combining method, which combines several low-voltage push-pull amplifiers in series by magnetic coupling. To demonstrate the validity of the new concept, a 2.4-GHz 1.9-W 2-V fully integrated power-amplifier achieving a power-added efficiency of 41% with 50-Ω input and output matching has been fabricated using 0.35-μm CMOS transistor

A 24-GHz, +14.5-dBm fully integrated power amplifier in 0.18-μm CMOS

A 24-GHz +14.5-dBm fully integrated power amplifier with on-chip 50-[ohm] input and output matching is demonstrated in 0.18-μm CMOS. The use of substrate-shielded coplanar waveguide structures for matching networks results in low passive loss and small die size. Simple circuit techniques based on stability criteria derived result in an unconditionally stable amplifier. The power amplifier achieves a power gain of 7 dB and a maximum single-ended output power of +14.5-dBm with a 3-dB bandwidth of 3.1 GHz, while drawing 100 mA from a 2.8-V supply. The chip area is 1.26 mm^2

Analysis of S-band solid-state transmitters for the solar power satellite

The possibility of replacing the Reference System antenna in which thermionic devices are used for the dc-to-microwave conversion, with solid-state elements was explored. System, device, and antenna module tradeoff investigations strongly point toward the desirability of changing the transmitter concept to a distributed array of relatively low power elements, deriving their dc power directly from the solar cell array and whose microwave power outputs are combined in space. The approach eliminates the thermal, weight, and dc-voltage distribution problems of a system in which high power tubes are simply replaced with clusters of solid state amplifiers. The proposed approach retains the important advantages of a solid state system: greatly enhanced reliability and graceful degradation of the system

Amplificador de RF Doherty assimétrico de 2-vias

Mestrado em Engenharia Electrónica e TelecomunicaçõesOs atuais esquemas de modulação e acesso ao meio, tais como o Wide- Band Code-Division Multiple Access (WCDMA) ou Orthogonal Frequency- Division Multiple Access (OFDMA), que são otimizados para a gestão eficiente do espetro electromagnético e elevada taxa de transmissão, originam sinais de elevado Peak-to-Average Power Ratio (PAPR) e requisitos de linearidade rigorosos. As arquiteturas de amplificação tradicionais, i.e. baseadas no operação em modo de corrente do dispositivo ativo, são incapazes de satisfazer estes requisitos em simultâneo. Assim, o amplificador de potência (do inglês, Power Ampli_er (PA)) incorre numa degradação significativa de rendimento energético em favor de maior linearidade, aumentando simultaneamente os custos de operação das estacões base para os operadores de telecomunicações móveis e o impacte ambiental. Este trabalho foca-se no estudo da arquitetura Doherty, a principal solução encontrada para melhorar o compromisso linearidade/rendimento para aplicações em estações-base de comunicações móveis. Para tal, são expostos os princípios básicos de amplificadores de rádio frequência assim como a análise teórica do tradicional PA Doherty (do inglês, Doherty Power Amplifier (DhPA)) de duas vias e suas variantes. O estudo _e complementado com o projeto e implementação de um PA excitador, em classe-AB, e de um DhPA de elevada potência, colocando-se em prática a teoria e técnicas de projeto estudadas ao longo deste trabalho, aliadas aos desafios da implementação com dispositivos reais de elevada potência.Current modulation and medium access schemes, such as WCDMA, OFDMA, which are optimized for efficient management of the electromagnetic spectrum and high transmission rate, produce high PAPR signals and stringent linearity requirements. The traditional amplification architectures, i.e. based on current mode operation of the active device, are unable to meet these requirements simultaneously. As such, the power amplifier (PA) incurs in a significant degradation of energy efficiency in favor of greater linearity. Therefore they simultaneously increase the mobile telecom service providers base station operating costs and the environmental impact. This work focuses on the study of the Doherty architecture, the leading solution to improve the linearity/efficiency trade off for mobile communication base station applications. To this end, the basic principles of radio-frequency amplifiers are exposed as well as a theoretical analysis of the traditional two-way DhPA and its variants. The study is complemented with the design and implementation of a class- AB driver PA and a high power DhPA, putting into practice the theory and design techniques studied throughout this work together with the challenges of real, high power device implementation