1,171 research outputs found

    Four-element phased-array beamformers and a self-interference canceling full-duplex transciver in 130-nm SiGe for 5G applications at 26 GHz

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    This thesis is on the design of radio-frequency (RF) integrated front-end circuits for next generation 5G communication systems. The demand for higher data rates and lower latency in 5G networks can only be met using several new technologies including, but not limited to, mm-waves, massive-MIMO, and full-duplex. Use of mm-waves provides more bandwidth that is necessary for high data rates at the cost of increased attenuation in air. Massive-MIMO arrays are required to compensate for this increased path loss by providing beam steering and array gain. Furthermore, full duplex operation is desirable for improved spectrum efficiency and reduced latency. The difficulty of full duplex operation is the self-interference (SI) between transmit (TX) and receive (RX) paths. Conventional methods to suppress this interference utilize either bulky circulators, isolators, couplers or two separate antennas. These methods are not suitable for fully-integrated full-duplex massive-MIMO arrays. This thesis presents circuit and system level solutions to the issues summarized above, in the form of SiGe integrated circuits for 5G applications at 26 GHz. First, a full-duplex RF front-end architecture is proposed that is scalable to massive-MIMO arrays. It is based on blind, RF self-interference cancellation that is applicable to single/shared antenna front-ends. A high resolution RF vector modulator is developed, which is the key building block that empowers the full-duplex frontend architecture by achieving better than state-of-the-art 10-b monotonic phase control. This vector modulator is combined with linear-in-dB variable gain amplifiers and attenuators to realize a precision self-interference cancellation circuitry. Further, adaptive control of this SI canceler is made possible by including an on-chip low-power IQ downconverter. It correlates copies of transmitted and received signals and provides baseband/dc outputs that can be used to adaptively control the SI canceler. The solution comes at the cost of minimal additional circuitry, yet significantly eases linearity requirements of critical receiver blocks at RF/IF such as mixers and ADCs. Second, to complement the proposed full-duplex front-end architecture and to provide a more complete solution, high-performance beamformer ICs with 5-/6- b phase and 3-/4-b amplitude control capabilities are designed. Single-channel, separate transmitter and receiver beamformers are implemented targeting massive- MIMO mode of operation, and their four-channel versions are developed for phasedarray communication systems. Better than state-of-the-art noise performance is obtained in the RX beamformer channel, with a full-channel noise figure of 3.3 d

    PLC Networks with In-Band Full-Duplex Relays

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    Electromagnetic compatibility regulations impose strict transmit power spectral density limitations on power line communication (PLC) that limits the coverage it can provide.As a consequence, PLC networks, especially those used in smart grid neighborhood area networks, employ one or more repeaters/relays for coverage enhancement. In this paper, we analyze the use of in-band full-duplex (IBFD) operation in relaying for power line networks. We present analyses and numerical results to demonstrate the superior operating performance of IBFD-based relay-aided networks over the legacy half-duplex ones, and contrast the extent of performance enhancement we achieve over using direct links. To estimate such performance,we focus on orthogonal frequency division multiplexing (OFDM) systems, which are standard in PLC. We investigate both decode-and-forward and amplify-and-forward schemes of relaying fordual-hop power line links, and quantify the performance in terms of the attainable data rate under diverse realistic power linechannel and noise conditions. The fundamental analyses provided in this work guide the design of future IBFD relay-aided PLC networks across application scenarios.Universidad de Málaga. Campus de Excelencia Internacional Andalucía Tech

    Antenna/Propagation Domain Self-Interference Cancellation (SIC) for In-Band Full-Duplex Wireless Communication Systems.

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    In-band full duplex (IBFD) is regarded as one of the most significant technologies for addressing the issue of spectrum scarcity in 5G and beyond systems. In the realization of practical IBFD systems, self-interference, i.e., the interference that the transmitter causes to the collocated receiver, poses a major challenge to antenna designers; it is a prerequisite for applying other self-interference cancellation (SIC) techniques in the analog and digital domains. In this paper, a comprehensive survey on SIC techniques in the antenna/propagation (AP) domain is provided and the pros and cons of each technique are studied. Opportunities and challenges of employing IBFD antennas in future wireless communications networks are discussed

    Hardware Impairments Aware Transceiver Design for Full-Duplex Amplify-and-Forward MIMO Relaying

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    In this work we study the behavior of a full-duplex (FD) and amplify-and-forward (AF) relay with multiple antennas, where hardware impairments of the FD relay transceiver is taken into account. Due to the inter-dependency of the transmit relay power on each antenna and the residual self-interference in an FD-AF relay, we observe a distortion loop that degrades the system performance when the relay dynamic range is not high. In this regard, we analyze the relay function in presence of the hardware inaccuracies and an optimization problem is formulated to maximize the signal to distortion-plus-noise ratio (SDNR), under relay and source transmit power constraints. Due to the problem complexity, we propose a gradient-projection-based (GP) algorithm to obtain an optimal solution. Moreover, a nonalternating sub-optimal solution is proposed by assuming a rank-1 relay amplification matrix, and separating the design of the relay process into multiple stages (MuStR1). The proposed MuStR1 method is then enhanced by introducing an alternating update over the optimization variables, denoted as AltMuStR1 algorithm. It is observed that compared to GP, (Alt)MuStR1 algorithms significantly reduce the required computational complexity at the expense of a slight performance degradation. Finally, the proposed methods are evaluated under various system conditions, and compared with the methods available in the current literature. In particular, it is observed that as the hardware impairments increase, or for a system with a high transmit power, the impact of applying a distortion-aware design is significant.Comment: Submitted to IEEE Transactions on Wireless Communication
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