A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI

This work demonstrates a RISC-V vector microprocessor implemented in 28 nm FDSOI with fully integrated simultaneous-switching switched-capacitor DC-DC (SC DC-DC) converters and adaptive clocking that generates four on-chip voltages between 0.45 and 1 V using only 1.0 V core and 1.8 V IO voltage inputs. The converters achieve high efficiency at the system level by switching simultaneously to avoid charge-sharing losses and by using an adaptive clock to maximize performance for the resulting voltage ripple. Details about the implementation of the DC-DC switches, DC-DC controller, and adaptive clock are provided, and the sources of conversion loss are analyzed based on measured results. This system pushes the capabilities of dynamic voltage scaling by enabling fast transitions (20 ns), simple packaging (no off-chip passives), low area overhead (16%), high conversion efficiency (80%-86%), and high energy efficiency (26.2 DP GFLOPS/W) for mobile devices

One-cycle control of switching converters

A new large-signal nonlinear control technique is proposed to control the duty-ratio d of a switch such that in each cycle the average value of a switched variable of the switching converter is exactly equal to or proportional to the control reference in the steady-state or in a transient. One-cycle control rejects power source perturbations in one switching cycle; the average value of the switched variable follows the dynamic reference in one switching cycle; and the controller corrects switching errors in one switching cycle. There is no steady-state error nor dynamic error between the control reference and the average value of the switched variable. Experiments with a constant frequency buck converter have demonstrated the robustness of the control method and verified the theoretical predictions. This new control method is very general and applicable to all types of pulse-width-modulated, resonant-based, or soft-switched switching converters for either voltage or current control in continuous or discontinuous conduction mode. Furthermore, it can be used to control any physical variable or abstract signal that is in the form of a switched variable or can be converted to the form of a switched variable

Linear-assisted DC/DC converters with modified current-mode control applied to photovoltaic solar systems

This article shows the proposal of a current-mode one-cycle control for linear-assisted DC/DC converters. Linearassisted DC/DC converters are structures that allow to take advantages of the two classic alternatives in the design of power supply systems: voltage linear regulators (classic NPN topology or LDO –low dropout–) and switching DC/DC converters. The current-mode one-cycle control technique is proposed in order to obtain the duty cycle of the linear-assisted converter switch. The proposed structure can provide an output with suitable load and line regulations. Thus, the paper shows the design and simulation results of the proposed current-mode one-cycle linear-assisted converter.Postprint (published version

Polynomial Curve Slope Compensation for Peak-Current-Mode-Controlled Power Converters

Linear ramp slope compensation (LRC) and quadratic slope compensation (QSC) are commonly implemented in peak-current-mode-controlled dc-dc converters in order to minimize subharmonic and chaotic oscillations. Both compensating schemes rely on the linearized state-space averaged model (LSSA) of the converter. The LSSA ignores the impact that switching actions have on the stability of converters. In order to include switching events, the nonlinear analysis method based on the Monodromy matrix was introduced to describe a complete-cycle stability. Analyses on analog-controlled dc-dc converters applying this method show that system stability is strongly dependent on the change of the derivative of the slope at the time of switching instant. However, in a mixed-signal-controlled system, the digitalization effect contributes differently to system stability. This paper shows a full complete-cycle stability analysis using this nonlinear analysis method, which is applied to a mixed-signal-controlled converter. Through this analysis, a generalized equation is derived that reveals for the first time the real boundary stability limits for LRC and QSC. Furthermore, this generalized equation allows the design of a new compensating scheme, which is able to increase system stability. The proposed scheme is called polynomial curve slope compensation (PCSC) and it is demonstrated that PCSC increases the stable margin by 30% compared to LRC and 20% to QSC. This outcome is proved experimentally by using an interleaved dc-dc converter that is built for this work

Fully equipped half bridge building block for fast prototyping of switching power converters

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A mixed-signal fuzzy controller and its application to soft start of DC motors

Presents a mixed-signal fuzzy controller chip and its application to control of DC motors. The controller is based on a multiplexed architecture presented by the authors (1998), where building blocks are also described. We focus here on showing experimental results from an example implementation of this architecture as well as on illustrating its performance in an application that has been proposed and developed. The presented chip implements 64 rules, much more than the reported pure analog monolithic fuzzy controllers, while preserving most of their advantages. Specifically, the measured input-output delay is around 500 ns for a power consumption of 16 mW and the chip area (without pads) is 2.65 mm/sup 2/. In the presented application, sensed motor speed and current are the controller input, while it determines the proper duty cycle to a PWM control circuit for the DC-DC converter that powers the motor drive. Experimental results of this application are also presented.Comisión Interministerial de Ciencia y Tecnología TIC99-082

Energy-aware MPC co-design for DC-DC converters

In this paper, we propose an integrated controller design methodology for the implementation of an energy-aware explicit model predictive control (MPC) algorithms, illustrat- ing the method on a DC-DC converter model. The power consumption of control algorithms is becoming increasingly important for low-power embedded systems, especially where complex digital control techniques, like MPC, are used. For DC-DC converters, digital control provides better regulation, but also higher energy consumption compared to standard analog methods. To overcome the limitation in energy efficiency, instead of addressing the problem by implementing sub-optimal MPC schemes, the closed-loop performance and the control algorithm power consumption are minimized in a joint cost function, allowing us to keep the controller power efficiency closer to an analog approach while maintaining closed-loop op- timality. A case study for an implementation in reconfigurable hardware shows how a designer can optimally trade closed-loop performance with hardware implementation performance

One-Quadrant Switched-Mode Power Converters

This article presents the main topics related to one-quadrant power converters. The basic topologies are analysed and a simple methodology to obtain the steady-state output-input voltage ratio is set out. A short discussion of different methods to control one-quadrant power converters is presented. Some of the reported derived topologies of one-quadrant power converters are also considered. Some topics related to one-quadrant power converters such as synchronous rectification, hard and soft commutation, and interleaved converters are discussed. Finally, a brief introduction to resonant converters is given.Comment: 25 pages, contribution to the 2014 CAS - CERN Accelerator School: Power Converters, Baden, Switzerland, 7-14 May 201