Synthesis and analysis of nonlinear, analog, ultra low power, Bernoulli cell based CytoMimetic circuits for biocomputation

A novel class of analog BioElectronics is introduced for the systematic implementation of ultra-low power microelectronic circuits, able to compute nonlinear biological dynamics. This class of circuits is termed ``CytoMimetic Circuits'', in an attempt to highlight their actual function, which is mimicking biological responses, as observed experimentally. Inspired by the ingenious Bernoulli Cell Formalism (BCF), which was originally formulated for the modular synthesis and analysis of linear, time-invariant, high-dynamic range, logarithmic filters, a new, modified mathematical framework has been conceived, termed Nonlinear Bernoulli Cell Formalism (NBCF), which forms the core mathematical framework, characterising the operation of CytoMimetic circuits. The proposed nonlinear, transistor-level mathematical formulation exploits the striking similarities existing between the NBCF and coupled ordinary differential equations, typically appearing in models of naturally encountered biochemical systems. The resulting continuous-time, continuous-value, low-power CytoMimetic electronic circuits succeed in simulating with good accuracy cellular and molecular dynamics and found to be in very good agreement with their biological counterparts. They usually occupy an area of a fraction of a square millimetre, while consuming between hundreds of nanowatts and few tenths of microwatts of power. The systematic nature of the NBCF led to the transformation of a wide variety of biochemical reactions into nonlinear Log-domain circuits, which span a large area of different biological model types. Moreover, a detailed analysis of the robustness and performance of the proposed circuit class is also included in this thesis. The robustness examination has been conducted via post-layout simulations of an indicative CytoMimetic circuit and also by providing fabrication-related variability simulations, obtained by means of analog Monte Carlo statistical analysis for each one of the proposed circuit topologies. Furthermore, a detailed mathematical analysis that is carefully addressing the effect of process-parameters and MOSFET geometric properties upon subthreshold translinear circuits has been conducted for the fundamental translinear blocks, CytoMimetic topologies are comprised of. Finally, an interesting sub-category of Neuromorphic circuits, the ``Log-Domain Silicon Synapses'' is presented and representative circuits are thoroughly analysed by a novel, generalised BC operator framework. This leads to the conclusion that the BC operator consists the heart of such Log-domain circuits, therefore, allows the establishment of a general class of BC-based silicon synaptic circuits, which includes most of the synaptic circuits, implemented so far in Log-domain.Open Acces

Analog Squarers Using only Seven MOS Transistors and a Four Quadrant Analog Multiplier Application

Two new analog squarer circuits employing only seven MOS transistors are proposed in this study. The second proposed analog squarer is derived from the first one with slight modifications. MOS transistors used in both of the proposed analog squarers are operated in the saturation region. They are constructed as voltage input and current output. They have high input and high output impedances; consequently, they can be connected with other structures easily. Both of the proposed analog squarers have low power dissipation. However, they need some active component matching conditions. A four quadrant analog multiplier is given as an application example. Workability of the proposed analog squarers is verified by some SPICE simulation results. Additionally, some experimental tests are achieved. © 2018 World Scientific Publishing Company

Low-voltage, low-power circuits for data communication systems

There are growing industrial demands for low-voltage supply and low-power consumption circuits and systems. This is especially true for very high integration level and very large scale integrated (VLSI) mixed-signal chips and system-on-a-chip. It is mainly due to the limited power dissipation within a small area and the costs related to the packaging and thermal management. In this research work, two low-voltage, low-power integrated circuits used for data communication systems are introduced. The first one is a high performance continuous-time linear phase filter with automatic frequency tuning. The filter can be used in hard disk driver systems and wired communication systems such as 1000Base-T transceivers. A pseudo-differential operational transconductance amplifier (OTA) based on transistors operating in triode region is used to achieve a large linear signal swing with low-voltage supplies. A common-mode (CM) control circuit that combines common-mode feedback (CMFB), common-mode feedforward (CMFF), and adaptive-bias has been proposed. With a 2.3V single supply, the filters total harmonic distortion is less than 44dB for a 2VPP differential input, which is due to the well controlled CM behavior. The ratio of the root mean square value of the ac signal to the power supply voltage is around 31%, which is much better than previous realizations. The second integrated circuit includes two LVDS drivers used for high-speed point-to-point links. By removing the stacked switches used in the conventional structures, both LVDS drivers can operate with ultra low-voltage supplies. Although the Double Current Sources (DCS) LVDS driver draws twice minimum static current as required by the signal swing, it is quite simple and achieves very high speed operation. The Switchable Current Sources (SCS) LVDS driver, by dynamically switching the current sources, draws minimum static current and reduces the power consumption by 60% compared to the previously reported LVDS drivers. Both LVDS drivers are compliant to the standards and operate at data rates up to gigabits-per-second

CMOS current amplifiers : speed versus nonlinearity

This work deals with analogue integrated circuit design using various types of current-mode amplifiers. These circuits are analysed and realised using modern CMOS integration technologies. The dynamic nonlinearities of these circuits are discussed in detail as in the literature only linear nonidealities and static nonlinearities are conventionally considered. For the most important open-loop current-mode amplifier, the second-generation current-conveyor (CCII), a macromodel is derived that, unlike other reported macromodels, can accurately predict the common-mode behaviour in differential applications. Similarly, this model is used to describe the nonidealities of several other current-mode amplifiers because similar circuit structures are common in such amplifiers. With modern low-voltage CMOS-technologies, the current-mode operational amplifier and the high-gain current-conveyor (CCII∞) perform better than open-loop current-amplifiers. Similarly, unlike with conventional voltage-mode operational amplifiers, the large-signal settling behaviour of these two amplifier types does not degrade as CMOS-processes are scaled down. In this work, two 1 MHz 3rd -order low-pass continuous-time filters are realised with a 1.2 μm CMOS-process. These filters use a differential CCII∞ with linearised, dynamically biased output stages resulting in performance superior to most OTA-C filter realisations reported. Similarly, two logarithmic amplifier chips are designed and fabricated. The first circuit, implemented with a 1.2 μm BiCMOS-process, uses again a CCII∞. This circuit uses a pn-junction as a logarithmic feedback element. With a CCII∞ the constant gain-bandwidth product, typical of voltage-mode operational amplifiers, is avoided resulting in a constant 1 MHz bandwidth with a 60 dB signal amplitude range. The second current-mode logarithmic amplifier, based on piece-wise linear approximation of the logarithmic function by a cascade of limiting current amplifier stages, is realised in a standard 1.2 μm CMOS-process. The limiting level in these current amplifiers is less sensitive to process variation than in limiting voltage amplifiers resulting in exceptionally low temperature dependency of the logarithmic output signal. Additionally, along with this logarithmic amplifier a new current peak detectoris developed.reviewe