An Ultra Low Power Voltage Regulator for RFID Application

An ultra low power and low voltage regulator for radio-frequency identification (RFID) passive tags is designed and optimized in this thesis. It consists of a low power sub-1V reference voltage generator with temperature and supply voltage ripple compensation, and a low-dropout voltage (LDO) regulator. The circuits are designed in CMOS 65nm technology. The total quiescent current of 63.8nA at 1.5V supply voltage has been achieved using properly sized transistors operating in the subthreshold region. With the low voltage property of transistors operating in subthreshold region the output regulated voltage can easily achieve 1V with load capacity of 50uA. Self-biased current sources are employed and optimized to eliminate the effect of supply voltage variation and to achieve a line regulation of 4.06mV/V. A PMOS pass device with small output resistance is used to reduce the load regulation to 6.57mV/50uA. By utilizing subthreshold properties, the temperature coefficient is reduced to 12.7 and 31ppm/°C for the reference voltage and regulated voltage, respectively. The circuits can operate well from -30°C to 50°C, a typical temperature range of the environment where RFID tags are widely deployed

Near-Zero-Power Temperature Sensing via Tunneling Currents Through Complementary Metal-Oxide-Semiconductor Transistors.

Temperature sensors are routinely found in devices used to monitor the environment, the human body, industrial equipment, and beyond. In many such applications, the energy available from batteries or the power available from energy harvesters is extremely limited due to limited available volume, and thus the power consumption of sensing should be minimized in order to maximize operational lifetime. Here we present a new method to transduce and digitize temperature at very low power levels. Specifically, two pA current references are generated via small tunneling-current metal-oxide-semiconductor field effect transistors (MOSFETs) that are independent and proportional to temperature, respectively, which are then used to charge digitally-controllable banks of metal-insulator-metal (MIM) capacitors that, via a discrete-time feedback loop that equalizes charging time, digitize temperature directly. The proposed temperature sensor was integrated into a silicon microchip and occupied 0.15 mm2 of area. Four tested microchips were measured to consume only 113 pW with a resolution of 0.21 °C and an inaccuracy of ±1.65 °C, which represents a 628× reduction in power compared to prior-art without a significant reduction in performance

A battery-less, self-sustaining RF energy harvesting circuit with TFETs for µW power applications

This paper proposes a Tunnel FET (TFET) power management circuit for RF energy harvesting applications. In contrast with conventional MOSFET technologies, the improved electrical characteristics of TFETs promise a better behavior in the process of rectification and conversion at ultra-low power (µW) and voltage (sub-0.25 V) levels. RF powered systems can not only benefit from TFETs in front-end rectifiers by harvesting the surrounding energy at levels where conventional technologies cannot operate but also in the minimization of energy required by the power management circuit. In this work we present an energy harvesting circuit for RF sources designed with TFETs. The TFET controller emulates an adequate impedance at the output of the rectifier in order to allow maximum transfer of power from the RF source to the input of the boost converter. The output load is activated once the output capacitor reaches a voltage value of 0.5 V. The results show an efficiency boost of 89 % for an output load consuming 1 µW with an available RF power of -25 dBm.Postprint (published version

Output power limitations and improvements in passively mode locked GaAs/AlGaAs quantum well lasers

We report a novel approach for increasing the output power in passively mode locked semiconductor lasers. Our approach uses epitaxial structures with an optical trap in the bottom cladding that enlarges the vertical mode size to scale the pulse saturation energy. With this approach we demonstrate a very high peak power of 9.8 W per facet, at a repetition rate of 6.8 GHz and with pulse duration of 0.71 ps. In particular, we compare two GaAs/AlGaAs epilayer designs, a double quantum well design operating at 830 nm and a single quantum well design operating at 795 nm, with vertical mode sizes of 0.5 and 0.75 μm, respectively. We show that a larger mode size not only shifts the mode locking regime of operation toward higher powers, but also produces other improvements with respect to two main failure mechanisms that limit the output power, catastrophic optical mirror damage and catastrophic optical saturable absorber damage. For the 830-nm material structure, we also investigate the effect of nonabsorbing mirrors on output power and mode locked operation of colliding pulse mode locked lasers

Growth Of Antimony Doped P-type Zinc Oxide Nanowires For Optoelectronics

In a method of growing p-type nanowires, a nanowire growth solution of zinc nitrate (Zn(NO₃)₂), hexamethylenetetramine (HMTA) and polyethylenemine (800 Mw PEI) is prepared. A dopant solution to the growth solution, the dopant solution including an equal molar ration of sodium hydroxide (NaOH), glycolic acid (C₂H₄O₃) and antimony acetate (Sb(CH₃COO)₃) in water is prepared. The dopant solution and the growth solution combine to generate a resulting solution that includes antimony to zinc in a ratio of between 0.2% molar to 2.0% molar, the resulting solution having a top surface. An ammonia solution is added to the resulting solution. A ZnO seed layer is applied to a substrate and the substrate is placed into the top surface of the resulting solution with the ZnO seed layer facing downwardly for a predetermined time until Sb-doped ZnO nanowires having a length of at least 5 μm have grown from the ZnO seed layer.Georgia Tech Research Corporatio