Efficient multicast routing algorithms for mesh-connected multicomputers

Multicast is a collective communication method in which a message is sent from a source to an arbitrary number of distinct destinations. Multicomputers refer to massively parallel computers that consist of thousands of processors built to handle computation intensive applications. Mesh is a kind of network topology widely used in multicomputers. Performance of multicomputers largely depends on that of the underlying network communications such as multicast, which is essential for processors to exchange data and messages. Two major parameters used to evaluate multicast routing are the time it takes to deliver the message to all destinations and the traffic which refers to the total number of links involved. Research indicated that these two parameters are normally not independent, but contradict each other. It has been proved that traffic optimal multicast problems such as Optimal Multicast Path/Tree in mesh-connected network are NP-complete. Hence, it is NP-hard to find multicast routing which is optimal on both time and traffic. In this thesis, we proposed three efficient multicast routing algorithms for mesh-connected multicomputers: DIAG, DDS and XY-path, all of which have a small complexity of O(KN) or less. The DIAG and DDS are two tree-based shortest path multicast routing algorithms designed for store-and-forward switched mesh network, which obtained near optimal time and reduced traffic significantly over its predecessor VH algorithm. XY-path is a dual-path-based multicast routing algorithm intended for wormhole routed 2D mesh network, which reduced the time and traffic significantly over LIN's Hamiltonian path-based algorithm. Performance evaluations of these algorithms resulted from simulations are given at the end of the thesis

Deterministic 1-k routing on meshes with applications to worm-hole routing

In $1$-$k$ routing each of the $n^2$ processing units of an $n \times n$ mesh connected computer initially holds $1$ packet which must be routed such that any processor is the destination of at most $k$ packets. This problem reflects practical desire for routing better than the popular routing of permutations. $1$-$k$ routing also has implications for hot-potato worm-hole routing, which is of great importance for real world systems. We present a near-optimal deterministic algorithm running in \sqrt{k} \cdot n / 2 + \go{n} steps. We give a second algorithm with slightly worse routing time but working queue size three. Applying this algorithm considerably reduces the routing time of hot-potato worm-hole routing. Non-trivial extensions are given to the general $l$-$k$ routing problem and for routing on higher dimensional meshes. Finally we show that $k$-$k$ routing can be performed in \go{k \cdot n} steps with working queue size four. Hereby the hot-potato worm-hole routing problem can be solved in \go{k^{3/2} \cdot n} steps

Routing Permutations in Partitioned Optical Passive Star Networks

It is shown that a POPS network with g groups and d processors per group can efficiently route any permutation among the n=dg processors. The number of slots used is optimal in the worst case, and is at most the double of the optimum for all permutations p such that p(i)i for all i.Comment: 8 pages, 3 figure

Shortest path routing algorithm for hierarchical interconnection network-on-chip

Interconnection networks play a significant role in efficient on-chip communication for multicore systems. This paper introduces a new interconnection topology called the Hierarchical Cross Connected Recursive network (HCCR) and a shortest path routing algorithm for the HCCR. Proposed topology offers a high degree of regularity, scalability, and symmetry with a reduced number of links and node degree. A unique address encoding scheme is proposed for hierarchical graphical representation of HCCR networks, and based on this scheme a shortest path routing algorithm is devised. The algorithm requires 5(k-1) time where k=logn4-2 and k>0, in worst case to determine the next node along the shortest path

Quarc: a novel network-on-chip architecture

This paper introduces the Quarc NoC, a novel NoC architecture inspired by the Spidergon NoC. The Quarc scheme significantly outperforms the Spidergon NoC through balancing the traffic which is the result of the modifications applied to the topology and the routing elements.The proposed architecture is highly efficient in performing collective communication operations including broadcast and multicast. We present the topology, routing discipline and switch architecture for the Quarc NoC and demonstrate the performance with the results obtained from discrete event simulations