Multi-variate time-series for time constraint adherence prediction in complex job shops

One of the most complex and agile production environments is semiconductor manufacturing, especially wafer fabrication, as products require more than several hundred operations and remain in Work-In-Progress for months leading to complex job shops. Additionally, an increasingly competitive market environment, i.e. owing to Moore’s law, forces semiconductor companies to focus on operational excellence, resiliency and, hence, leads to product quality as a decisive factor. Product-specific time constraints comprising two or more, not necessarily consecutive, operations ensure product quality at an operational level and, thus, are an industry-specific challenge. Time constraint adherence is of utmost importance, since violations typically lead to scrapping entire lots and a deteriorating yield. Dispatching decisions that determine time constraint adherence are as a state of the art performed manually, which is stressful and error-prone. Therefore, this article presents a data-driven approach combining multi-variate time-series with centralized information to predict time constraint adherence probability in wafer fabrication to facilitate dispatching. Real-world data is analyzed and different statistical and machine learning models are evaluated

A Simulation study of dispatching rules and rework strategies in semiconductor manufacturing

The semiconductor industry is fast paced and on the cutting edge of technology, resulting in very short life spans of semiconductor products. In order to stay competitive, manufacturers must be able to quickly adapt to produce new products, and they must achieve a high level of productivity. Two major operational components of semiconductor fabrication plants (fabs) that effect productivity are dispatching rules and rework strategies. Although prior research has been conducted independently on these two issues, the hypothesis is that the interrelationship between the dispatching rules and rework strategies has a significant effect on the productivity of the fab. Moreover, the goal is to determine which combination of widely-used dispatching rules and new and existing rework strategies results in the highest level of fab productivity. To test this hypothesis, the significance of rework is evalutated, and a four-factor experiment is conducted to determine the effect of dispatching rules, rework strategies, fab types, and rework levels on key fab performance measures. Five dispatching rules are combined with three previously studied rework strategies and the first bottleneck strategy which is developed in this study. The treatment combinations are compared based on fab performance measures including cycle time, percentage on time, work-in-process, and the XTheoretical value. Simulation models based on actual fab data are constructed to carry out the experiments. The detailed results of the experiment show that combinations of dispatching rules and rework strategies have a significant impact on fab performance measures at each rework level in both fab types. In general, two dispatching rules, rework priority and first-in-first-out, in combination with the first bottleneck rework strategy perform the best. Further analysis concludes that the rework priority dispatching rule and the first bottleneck rework strategy result in the highest level of fab performance and are most robust over alterative fab configurations

Development and Simulation Assessment of Semiconductor Production System Enhancements for Fast Cycle Times

Long cycle times in semiconductor manufacturing represent an increasing challenge for the industry and lead to a growing need of break-through approaches to reduce it. Small lot sizes and the conversion of batch processes to mini-batch or single-wafer processes are widely regarded as a promising means for a step-wise cycle time reduction. Our analysis with discrete-event simulation and queueing theory shows that small lot size and the replacement of batch tools with mini-batch or single wafer tools are beneficial but lot size reduction lacks persuasive effectiveness if reduced by more than half. Because the results are not completely convincing, we develop a new semiconductor tool type that further reduces cycle time by lot streaming leveraging the lot size reduction efforts. We show that this combined approach can lead to a cycle time reduction of more than 80%

MODELING AND SIMULATION OF A SEMICONDUCTOR MANUFACTURING FAB FOR CYCLE TIME ANALYSIS

The goal of the thesis is to conduct a study of the effects of scheduling policies and machine failures on the manufacturing cycle time of the Integrated Circuit (IC) manufacturing process for two processor chips, namely Skylake and Kabylake, manufactured by Intel. The fab simulation model was developed as First in First Out (FIFO), Shortest Processing Time (SPT), Priority based (PB), and Failure FIFO (machine failures) model, and the average cycle times and queue waiting times under the four scheduling policy models were compared for both the Skylake and Kabylake wafers. The study revealed that scheduling policies SPT and PB increased the average cycle time for Skylake wafers while decreasing the average cycle time for the Kabylake wafers, when compared to the base FIFO model. Machine failures increased the average cycle time for both types of wafers

Online Simulation in Semiconductor Manufacturing

In semiconductor manufacturing discrete event simulation systems are quite established to support multiple planning decisions. During the recent years, the productivity is increasing by using simulation methods. The motivation for this thesis is to use online simulation not only for planning decisions, but also for a wide range of operational decisions. Therefore an integrated online simulation system for short term forecasting has been developed. The production environment is a mature high mix logic wafer fab. It has been selected because of its vast potential for performance improvement. In this thesis several aspects of online simulation will be addressed: The first aspect is the implementation of an online simulation system in semiconductor manufacturing. The general problem is to achieve a high speed, a high level of detail, and a high forecast accuracy. To resolve these problems, an online simulation system has been created. The simulation model has a high level of detail. It is created automatically from underling fab data. To create such a simulation model from fab data, additional problems related to the underlying data arise. The major parts are the data access, the data integration, and the data quality. These problems have been solved by using an integrated data model with several data extraction, data transformation, and data cleaning steps. The second aspect is related to the accuracy of online simulation. The overall problem is to increase the forecast horizon, increase the level of detail of the forecast and reduce the forecast error. To provide useful forecast results, the simulation model contains a high level of modeling details and a proper initialization. The influences on the forecast quality will be analyzed. The results show that the simulation forecast accuracy achieves good quality to predict future fab performance. The last aspect is to find ways to use simulation forecast results to improve the fab performance. Numerous applications have been identified. For each application a description is available. It contains the requirements of such a forecast, the decision variables, and background information. An application example shows, where a performance problem exists and how online simulation is able to resolve it. To further enhance the real time capability of online simulation, a major part is to investigate new ways to connect the simulation model with the wafer fab. For fab driven simulation, the simulation model and the real wafer fab run concurrently. The wafer fab provides several events to update the simulation during runtime. So the model is always synchronized with the real fab. It becomes possible to start a simulation run in real time. There is no further delay for data extraction, data transformation and model creation. A prototype for a single work center has been implemented to show the feasibility

Entwicklung und Einführung von Produktionssteuerungsverbesserungen für die kundenorientierte Halbleiterfertigung

Production control in a semiconductor production facility is a very complex and timeconsuming task. Different demands regarding facility performance parameters are defined by customer and facility management. These requirements are usually opponents, and an efficient strategy is not simple to define. In semiconductor manufacturing, the available production control systems often use priorities to define the importance of each production lot. The production lots are ranked according to the defined priorities. This process is called dispatching. The priority allocation is carried out by special algorithms. In literature, a huge variety of different strategies and rules is available. For the semiconductor foundry business, there is a need for a very flexible and adaptable policy taking the facility state and the defined requirements into account. At our case the production processes are characterized by a low-volume high-mix product portfolio. This portfolio causes additional stability problems and performance lags. The unstable characteristic increases the influence of reasonable production control logic. This thesis offers a very flexible and adaptable production control policy. This policy is based on a detailed facility model with real-life production data. The data is extracted from a real high-mix low-volume semiconductor facility. The dispatching strategy combines several dispatching rules. Different requirements like line balance, throughput optimization and on-time delivery targets can be taken into account. An automated detailed facility model calculates a semi-optimal combination of the different dispatching rules under a defined objective function. The objective function includes different demands from the management and the customer. The optimization is realized by a genetic heuristic for a fast and efficient finding of a close-to-optimal solution. The strategy is evaluated with real-life production data. The analysis with the detailed facility model of this fab shows an average improvement of 5% to 8% for several facility performance parameters like cycle time per mask layer. Finally the approach is realized and applied at a typical high-mix low-volume semiconductor facility. The system realization bases on a JAVA implementation. This implementation includes common state-of-the-art technologies such as web services. The system replaces the older production control solution. Besides the dispatching algorithm, the production policy includes the possibility to skip several metrology operations under defined boundary conditions. In a real-life production process, not all metrology operations are necessary for each lot. The thesis evaluates the influence of the sampling mechanism to the production process. The solution is included into the system implementation as a framework to assign different sampling rules to different metrology operations. Evaluations show greater improvements at bottleneck situations. After the productive introduction and usage of both systems, the practical results are evaluated. The staff survey offers good acceptance and response to the system. Furthermore positive effects on the performance measures are visible. The implemented system became part of the daily tools of a real semiconductor facility.Produktionssteuerung im Bereich der kundenorientierten Halbleiterfertigung ist heutzutage eine sehr komplexe und zeitintensive Aufgabe. Verschiedene Anforderungen bezüglich der Fabrikperformance werden seitens der Kunden als auch des Fabrikmanagements definiert. Diese Anforderungen stehen oftmals in Konkurrenz. Dadurch ist eine effiziente Strategie zur Kompromissfindung nicht einfach zu definieren. Heutige Halbleiterfabriken mit ihren verfügbaren Produktionssteuerungssystemen nutzen oft prioritätsbasierte Lösungen zur Definition der Wichtigkeit eines jeden Produktionsloses. Anhand dieser Prioritäten werden die Produktionslose sortiert und bearbeitet. In der Literatur existiert eine große Bandbreite verschiedener Algorithmen. Im Bereich der kundenorientierten Halbleiterfertigung wird eine sehr flexible und anpassbare Strategie benötigt, die auch den aktuellen Fabrikzustand als auch die wechselnden Kundenanforderungen berücksichtigt. Dies gilt insbesondere für den hochvariablen geringvolumigen Produktionsfall. Diese Arbeit behandelt eine flexible Strategie für den hochvariablen Produktionsfall einer solchen Produktionsstätte. Der Algorithmus basiert auf einem detaillierten Fabriksimulationsmodell mit Rückgriff auf Realdaten. Neben synthetischen Testdaten wurde der Algorithmus auch anhand einer realen Fertigungsumgebung geprüft. Verschiedene Steuerungsregeln werden hierbei sinnvoll kombiniert und gewichtet. Wechselnde Anforderungen wie Linienbalance, Durchsatz oder Liefertermintreue können adressiert und optimiert werden. Mittels einer definierten Zielfunktion erlaubt die automatische Modellgenerierung eine Optimierung anhand des aktuellen Fabrikzustandes. Die Optimierung basiert auf einen genetischen Algorithmus für eine flexible und effiziente Lösungssuche. Die Strategie wurde mit Realdaten aus der Fertigung einer typischen hochvariablen geringvolumigen Halbleiterfertigung geprüft und analysiert. Die Analyse zeigt ein Verbesserungspotential von 5% bis 8% für die bekannten Performancekriterien wie Cycletime im Vergleich zu gewöhnlichen statischen Steuerungspolitiken. Eine prototypische Implementierung realisiert diesen Ansatz zur Nutzung in der realen Fabrikumgebung. Die Implementierung basiert auf der JAVA-Programmiersprache. Aktuelle Implementierungsmethoden erlauben den flexiblen Einsatz in der Produktionsumgebung. Neben der Fabriksteuerung wurde die Möglichkeit der Reduktion von Messoperationszeit (auch bekannt unter Sampling) unter gegebenen Randbedingungen einer hochvariablen geringvolumigen Fertigung untersucht und geprüft. Oftmals ist aufgrund stabiler Prozesse in der Fertigung die Messung aller Lose an einem bestimmten Produktionsschritt nicht notwendig. Diese Arbeit untersucht den Einfluss dieses gängigen Verfahrens aus der Massenfertigung für die spezielle geringvolumige Produktionsumgebung. Die Analysen zeigen insbesondere in Ausnahmesituationen wie Anlagenausfällen und Kapazitätsengpässe einen positiven Effekt, während der Einfluss unter normalen Produktionsbedingungen aufgrund der hohen Produktvariabilität als gering angesehen werden kann. Nach produktiver Einführung in einem typischen Vertreter dieser Halbleiterfabriken zeigten sich schnell positive Effekte auf die Fabrikperformance als auch eine breite Nutzerakzeptanz. Das implementierte System wurde Bestandteil der täglichen genutzten Werkzeuglandschaft an diesem Standort

Simulation-Based Analysis on Operational Control of Batch Processors in Wafer Fabrication

[EN] In semiconductor wafer fabrication (wafer fab), wafers go through hundreds of process steps on a variety of processing machines for electrical circuit building operations. One of the special features in the wafer fabs is that there exist batch processors (BPs) where several wafer lots are processed at the same time as a batch. The batch processors have a significant influence on system performance because the repetitive batching and de-batching activities in a reentrant product flow system lead to non-smooth product flows with high variability. Existing research on the BP control problems has mostly focused on the local performance, such as waiting time at the BP stations. This paper attempts to examine how much BP control policies affect the system-wide behavior of the wafer fabs. A simulation model is constructed with which experiments are performed to analyze the performance of BP control rules under various production environments. Some meaningful insights on BP control decisions are identified through simulation results.This work was supported by the Pukyong National University Research Abroad Fund (C-D-2016-0843).Koo, P.; Ruiz García, R. (2020). Simulation-Based Analysis on Operational Control of Batch Processors in Wafer Fabrication. Applied Sciences. 10(17):1-17. https://doi.org/10.3390/app10175936S1171017Wang, L.-C., Chu, P.-C., & Lin, S.-Y. (2019). Impact of capacity fluctuation on throughput performance for semiconductor wafer fabrication. Robotics and Computer-Integrated Manufacturing, 55, 208-216. doi:10.1016/j.rcim.2018.03.005Ham, M. (2012). Integer programming-based real-time dispatching (i-RTD) heuristic for wet-etch station at wafer fabrication. International Journal of Production Research, 50(10), 2809-2822. doi:10.1080/00207543.2011.594816Mathirajan, M., & Sivakumar, A. I. (2006). A literature review, classification and simple meta-analysis on scheduling of batch processors in semiconductor. The International Journal of Advanced Manufacturing Technology, 29(9-10), 990-1001. doi:10.1007/s00170-005-2585-1FOWLER, J. W., HOGG, G. L., & PHILLIPS, D. T. (2000). Control of multiproduct bulk server diffusion/oxidation processes. Part 2: multiple servers. IIE Transactions, 32(2), 167-176. doi:10.1080/07408170008963889Van Der Zee, D. J. (2002). Adaptive scheduling of batch servers in flow shops. International Journal of Production Research, 40(12), 2811-2833. doi:10.1080/00207540210136559Wang, J., Zheng, P., & Zhang, J. (2020). Big data analytics for cycle time related feature selection in the semiconductor wafer fabrication system. Computers & Industrial Engineering, 143, 106362. doi:10.1016/j.cie.2020.106362Neuts, M. F. (1967). A General Class of Bulk Queues with Poisson Input. The Annals of Mathematical Statistics, 38(3), 759-770. doi:10.1214/aoms/1177698869Deb, R. K., & Serfozo, R. F. (1973). Optimal control of batch service queues. Advances in Applied Probability, 5(2), 340-361. doi:10.2307/1426040Gurnani, H., Anupindi, R., & Akella, R. (1992). Control of batch processing systems in semiconductor wafer fabrication facilities. IEEE Transactions on Semiconductor Manufacturing, 5(4), 319-328. doi:10.1109/66.175364Avramidis, A. N., Healy, K. J., & Uzsoy, R. (1998). Control of a batch-processing machine: A computational approach. International Journal of Production Research, 36(11), 3167-3181. doi:10.1080/002075498192355Fowler, J. W., Phojanamongkolkij, N., Cochran, J. K., & Montgomery, D. C. (2002). Optimal batching in a wafer fabrication facility using a multiproduct G/G/c model with batch processing. International Journal of Production Research, 40(2), 275-292. doi:10.1080/00207540110081489Glassey, C. R., & Weng, W. W. (1991). Dynamic batching heuristic for simultaneous processing. IEEE Transactions on Semiconductor Manufacturing, 4(2), 77-82. doi:10.1109/66.79719Fowler, J. W., Phillips, D. T., & Hogg, G. L. (1992). Real-time control of multiproduct bulk-service semiconductor manufacturing processes. IEEE Transactions on Semiconductor Manufacturing, 5(2), 158-163. doi:10.1109/66.136278Sarin, S. C., Varadarajan, A., & Wang, L. (2010). A survey of dispatching rules for operational control in wafer fabrication. Production Planning & Control, 22(1), 4-24. doi:10.1080/09537287.2010.490014Koo, P.-H., & Moon, D. H. (2013). A Review on Control Strategies of Batch Processing Machines in Semiconductor Manufacturing. IFAC Proceedings Volumes, 46(9), 1690-1695. doi:10.3182/20130619-3-ru-3018.00203Leachman, R. C., Kang, J., & Lin, V. (2002). SLIM: Short Cycle Time and Low Inventory in Manufacturing at Samsung Electronics. Interfaces, 32(1), 61-77. doi:10.1287/inte.32.1.61.15ROBINSON, J. K., FOWLER, J. W., & BARD, J. F. (1995). The use of upstream and downstream information in scheduling semiconductor batch operations. International Journal of Production Research, 33(7), 1849-1869. doi:10.1080/00207549508904785NEALE, J. J., & DUENYAS, I. (2000). Control of manufacturing networks which contain a batch processing machine. IIE Transactions, 32(11), 1027-1041. doi:10.1080/07408170008967459SOLOMON, L., FOWLER, J. W., PFUND, M., & JENSEN, P. H. (2002). THE INCLUSION OF FUTURE ARRIVALS AND DOWNSTREAM SETUPS INTO WAFER FABRICATION BATCH PROCESSING DECISIONS. Journal of Electronics Manufacturing, 11(02), 149-159. doi:10.1142/s0960313102000370Çerekçi, A., & Banerjee, A. (2015). Effect of upstream re-sequencing in controlling cycle time performance of batch processors. Computers & Industrial Engineering, 88, 206-216. doi:10.1016/j.cie.2015.07.005Yeong-Dae, K., Dong-Ho, L., Jung-Ug, K., & Hwan-Kyun, R. (1998). A simulation study on lot release control, mask scheduling, and batch scheduling in semiconductor wafer fabrication facilities. Journal of Manufacturing Systems, 17(2), 107-117. doi:10.1016/s0278-6125(98)80024-1Bahaji, N., & Kuhl, M. E. (2008). A simulation study of new multi-objective composite dispatching rules, CONWIP, and push lot release in semiconductor fabrication. International Journal of Production Research, 46(14), 3801-3824. doi:10.1080/00207540600711879Li, Y., Jiang, Z., & Jia, W. (2013). An integrated release and dispatch policy for semiconductor wafer fabrication. International Journal of Production Research, 52(8), 2275-2292. doi:10.1080/00207543.2013.854938SPEARMAN, M. L., WOODRUFF, D. L., & HOPP, W. J. (1990). CONWIP: a pull alternative to kanban. International Journal of Production Research, 28(5), 879-894. doi:10.1080/00207549008942761Wein, L. M. (1988). Scheduling semiconductor wafer fabrication. IEEE Transactions on Semiconductor Manufacturing, 1(3), 115-130. doi:10.1109/66.4384Glassey, C. R., & Resende, M. G. C. (1988). Closed-loop job release control for VLSI circuit manufacturing. IEEE Transactions on Semiconductor Manufacturing, 1(1), 36-46. doi:10.1109/66.4371Qi, C., Sivakumar, A. I., & Gershwin, S. B. (2008). An efficient new job release control methodology. International Journal of Production Research, 47(3), 703-731. doi:10.1080/00207540701455335Yeong-Dae Kim, Jae-Gon Kim, Bum Choi, & Hyung-Un Kim. (2001). Production scheduling in a semiconductor wafer fabrication facility producing multiple product types with distinct due dates. IEEE Transactions on Robotics and Automation, 17(5), 589-598. doi:10.1109/70.96466

Adaptive Order Dispatching based on Reinforcement Learning: Application in a Complex Job Shop in the Semiconductor Industry

Heutige Produktionssysteme tendieren durch die Marktanforderungen getrieben zu immer kleineren Losgrößen, höherer Produktvielfalt und größerer Komplexität der Materialflusssysteme. Diese Entwicklungen stellen bestehende Produktionssteuerungsmethoden in Frage. Im Zuge der Digitalisierung bieten datenbasierte Algorithmen des maschinellen Lernens einen alternativen Ansatz zur Optimierung von Produktionsabläufen. Aktuelle Forschungsergebnisse zeigen eine hohe Leistungsfähigkeit von Verfahren des Reinforcement Learning (RL) in einem breiten Anwendungsspektrum. Im Bereich der Produktionssteuerung haben sich jedoch bisher nur wenige Autoren damit befasst. Eine umfassende Untersuchung verschiedener RL-Ansätze sowie eine Anwendung in der Praxis wurden noch nicht durchgeführt. Unter den Aufgaben der Produktionsplanung und -steuerung gewährleistet die Auftragssteuerung (order dispatching) eine hohe Leistungsfähigkeit und Flexibilität der Produktionsabläufe, um eine hohe Kapazitätsauslastung und kurze Durchlaufzeiten zu erreichen. Motiviert durch komplexe Werkstattfertigungssysteme, wie sie in der Halbleiterindustrie zu finden sind, schließt diese Arbeit die Forschungslücke und befasst sich mit der Anwendung von RL für eine adaptive Auftragssteuerung. Die Einbeziehung realer Systemdaten ermöglicht eine genauere Erfassung des Systemverhaltens als statische Heuristiken oder mathematische Optimierungsverfahren. Zusätzlich wird der manuelle Aufwand reduziert, indem auf die Inferenzfähigkeiten des RL zurückgegriffen wird. Die vorgestellte Methodik fokussiert die Modellierung und Implementierung von RL-Agenten als Dispatching-Entscheidungseinheit. Bekannte Herausforderungen der RL-Modellierung in Bezug auf Zustand, Aktion und Belohnungsfunktion werden untersucht. Die Modellierungsalternativen werden auf der Grundlage von zwei realen Produktionsszenarien eines Halbleiterherstellers analysiert. Die Ergebnisse zeigen, dass RL-Agenten adaptive Steuerungsstrategien erlernen können und bestehende regelbasierte Benchmarkheuristiken übertreffen. Die Erweiterung der Zustandsrepräsentation verbessert die Leistung deutlich, wenn ein Zusammenhang mit den Belohnungszielen besteht. Die Belohnung kann so gestaltet werden, dass sie die Optimierung mehrerer Zielgrößen ermöglicht. Schließlich erreichen spezifische RL-Agenten-Konfigurationen nicht nur eine hohe Leistung in einem Szenario, sondern weisen eine Robustheit bei sich ändernden Systemeigenschaften auf. Damit stellt die Forschungsarbeit einen wesentlichen Beitrag in Richtung selbstoptimierender und autonomer Produktionssysteme dar. Produktionsingenieure müssen das Potenzial datenbasierter, lernender Verfahren bewerten, um in Bezug auf Flexibilität wettbewerbsfähig zu bleiben und gleichzeitig den Aufwand für den Entwurf, den Betrieb und die Überwachung von Produktionssteuerungssystemen in einem vernünftigen Gleichgewicht zu halten

Statistical Methods for Semiconductor Manufacturing

In this thesis techniques for non-parametric modeling, machine learning, filtering and prediction and run-to-run control for semiconductor manufacturing are described. In particular, algorithms have been developed for two major applications area: - Virtual Metrology (VM) systems; - Predictive Maintenance (PdM) systems. Both technologies have proliferated in the past recent years in the semiconductor industries, called fabs, in order to increment productivity and decrease costs. VM systems aim of predicting quantities on the wafer, the main and basic product of the semiconductor industry, that may be physically measurable or not. These quantities are usually ’costly’ to be measured in economic or temporal terms: the prediction is based on process variables and/or logistic information on the production that, instead, are always available and that can be used for modeling without further costs. PdM systems, on the other hand, aim at predicting when a maintenance action has to be performed. This approach to maintenance management, based like VM on statistical methods and on the availability of process/logistic data, is in contrast with other classical approaches: - Run-to-Failure (R2F), where there are no interventions performed on the machine/process until a new breaking or specification violation happens in the production; - Preventive Maintenance (PvM), where the maintenances are scheduled in advance based on temporal intervals or on production iterations. Both aforementioned approaches are not optimal, because they do not assure that breakings and wasting of wafers will not happen and, in the case of PvM, they may lead to unnecessary maintenances without completely exploiting the lifetime of the machine or of the process. The main goal of this thesis is to prove through several applications and feasibility studies that the use of statistical modeling algorithms and control systems can improve the efficiency, yield and profits of a manufacturing environment like the semiconductor one, where lots of data are recorded and can be employed to build mathematical models. We present several original contributions, both in the form of applications and methods. The introduction of this thesis will be an overview on the semiconductor fabrication process: the most common practices on Advanced Process Control (APC) systems and the major issues for engineers and statisticians working in this area will be presented. Furthermore we will illustrate the methods and mathematical models used in the applications. We will then discuss in details the following applications: - A VM system for the estimation of the thickness deposited on the wafer by the Chemical Vapor Deposition (CVD) process, that exploits Fault Detection and Classification (FDC) data is presented. In this tool a new clustering algorithm based on Information Theory (IT) elements have been proposed. In addition, the Least Angle Regression (LARS) algorithm has been applied for the first time to VM problems. - A new VM module for multi-step (CVD, Etching and Litography) line is proposed, where Multi-Task Learning techniques have been employed. - A new Machine Learning algorithm based on Kernel Methods for the estimation of scalar outputs from time series inputs is illustrated. - Run-to-Run control algorithms that employ both the presence of physical measures and statistical ones (coming from a VM system) is shown; this tool is based on IT elements. - A PdM module based on filtering and prediction techniques (Kalman Filter, Monte Carlo methods) is developed for the prediction of maintenance interventions in the Epitaxy process. - A PdM system based on Elastic Nets for the maintenance predictions in Ion Implantation tool is described. Several of the aforementioned works have been developed in collaborations with major European semiconductor companies in the framework of the European project UE FP7 IMPROVE (Implementing Manufacturing science solutions to increase equiPment pROductiVity and fab pErformance); such collaborations will be specified during the thesis, underlying the practical aspects of the implementation of the proposed technologies in a real industrial environment

1996 Laboratory directed research and development annual report

This report summarizes progress from the Laboratory Directed Research and Development (LDRD) program during fiscal year 1996. In addition to a programmatic and financial overview, the report includes progress reports from 259 individual R&D projects in seventeen categories. The general areas of research include: engineered processes and materials; computational and information sciences; microelectronics and photonics; engineering sciences; pulsed power; advanced manufacturing technologies; biomedical engineering; energy and environmental science and technology; advanced information technologies; counterproliferation; advanced transportation; national security technology; electronics technologies; idea exploration and exploitation; production; and science at the interfaces - engineering with atoms