The Design and Linearization of 60GHz Injection Locked Power Amplifier

The RF power amplifier is one of the most critical blocks of transceivers, as it is expected to provide a suitable output power with high gain, efficiency and linearity. In this paper, a 60-GHz power amplifier based on an injection locked structure is demonstrated in a standard 65 CMOS technology. The PA core consists of a cross-coupled pair of NMOS transistors with an NMOS current source. This structure can achieve large output power and high PAE, but with poor linearity performance. In order to improve the linearity, several linearization techniques are investigated, including adaptive biasing and predistortion. The results show that the adaptive biasing technique can enlarge the linear operation region, but results in poor AM-PM performance. By instead using the predistortion technique, the AM-PM performance can be improved, but the linear region only extends slightly. Considering theses two techniques different advantages, we combine them together to improve not only the linear region but also the AM-PM performance. Finally, a common source amplifier is added as the first stage. With proper bias, the linear operation region is then effectively extended by 7.3 dB. This two stage power amplifier achieves large output power, high linearity and high PAE simultaneously. It delivers a gain of 20dB, a Psat of 16.3dBm, a P1dB of 15.41dBm, and a PAE of 30%.Since the invention of radio-frequency (RF) wireless communication more than 100 years ago, mobile phones and other wireless communications products for civilian consumption have developed rapidly. Nowadays, the demand for larger high data rate and capacities is rising sharply. The traditional wireless bandwidth is no longer able to meet some high-rate applications requirement. However, 60GHz wireless communication system is our solution, and up to 7 GHz unlicensed wide band around 60GHz is open to use across much of the world. Furthermore, the power amplifier (PA) is a critical part of any transmitter to convert the signal to higher power and drive the antenna. For power amplifiers, efficiency and linearity are most important. Power amplifiers with low efficiency will result in high level of heat dissipation. Linearity is a measure of the signal distortion, which consists of gain compression (AM-AM distortion) and phase distortion (AM-PM distortion). In this thesis work, an injection locked power amplifier is used to reduce the input driving requirements and improve the efficiency. Simulations have been performed for implementation in 65nm standard CMOS, which is a low-cost technology for fabrication of integrated circuits (chips). The injection locked technique means that a self-oscillating circuit is forced to run at the same frequency as the input signal. Furthermore, an integrated balun is added to transfer between single-ended and differential signals. The results show that this PA can achieve high efficiency but with poor linearity performance. In order to improve the linearity, different linearization techniques are investigated, including adaptive biasing and predistortion. Adaptive biasing is a feedback technique. At high output levels, the power amplifier has less gain, which leads to signal distortion. The adaptive biasing unit can sense the output power in real time and adjust the bias. The bias is then increased at increased output power in order to restore the power gain at high output levels. Predistortion is another linearization technique. A predistorter, which has a gain expansion characteristic, is then introduced before the PA to compensate for its gain reduction. Then, considering the advantages of these two linearization techniques, we combine them together to achieve even better results. Finally, a two-stage power amplifier is proposed by adding a common source amplifier as the first stage. The first stage can also produce a gain boost at the high output levels, and this expansion gain can be made to match the second-stage gain reduction very well. The simulation results show that the amplifier can achieve high linearity and efficiency at the same time

A STUDY ON LOW-PHASE-NOISE 77-GHZ CMOS TRANSMITTER FOR FMCW RADAR

학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2017. 2. 남상욱.This thesis presents design methodology and experimental verification of a low-phase-noise 77-GHz CMOS FMCW (Frequency Modulated Continuous Wave) radar transmitter. It is quite difficult to design a low-phase-noise signal generator at millimeter-wave frequencies in CMOS because gain of CMOS transistors is extremely low at those frequencies. When using a frequency multiplier, it is relatively advantageous to design a low-phase-noise signal source because a VCO can be designed at lower frequency band where gain of active devices is high. When using multiple stage frequency multipliers to achieve low-phase-noise performance, the operating frequency range can be reduced and DC power consumption can be increased. Therefore, in this thesis, two methods for realizing 77-GHz CMOS low-phase-noise signal source have been proposed. One method is to combine a ×6 frequency multiplier and a 12.8-GHz FMCW signal generator. In this case, a VCO, an injection-locked VCO buffer, a ×3 frequency multiplier (tripler), and a ×2 frequency multiplier (doubler) constituting the 77-GHz signal generator are designed as a four-stage coupled injection-locked oscillator (ILO) chain which is oscillated and injected into the output signal of the preceding stage. The VCO used in the 12.8-GHz PLL (phase locked loop) was designed using linearized transconductance (LiT: Linearized Transconductance) technology to have low phase noise characteristics and was designed to be simpler than the existing LiT VCO using a 3:2 transformer. Since the PLL is designed as the integer-N type, an external frequency modulated triangular reference signal must be injected into the phase frequency detector (PFD) of the PLL to generate the FMCW signal. The fabricated transmitter chip supports FMCW output signals in the 76.81-77.95 GHz band when supplied with the external reference triangular signal from 50.00 to 50.75 MHz. The RF output power is about 8.9 dBm and consumes 116.7 mW of DC power. The measured phase noise is -91.16 dBc/Hz at the 1-MHz offset of the 76.81-GHz carrier frequency, which is the lowest phase noise characteristic of the previously announced 77-GHz CMOS transmitter and transceiver. A transmitter module for 77-GHz radar performance measurement was fabricated by combining the transmitter chip with the on-chip feeder that can solve the millimeter-wave packaging problem. The other is a method of combining a ×28 frequency multiplier and a 2.75-GHz FMCW signal generator. As in the previous method, the VCO, a ×7 multiplier, and two ×2 multipliers constituting the 77-GHz signal generator are each designed as a 4-stage ILO chain. The VCO used in the 2.75-GHz PLL is designed as a class-C type that improves the startup problem to have low-phase-noise characteristics. As in the previous case, an integer-N type PLL is used. The fabricated transmitter chip supports FMCW output signals in the 76.26-78.23 GHz band when supplied with the external reference triangular signal from 42.55 to 43.65 MHz. The RF output power is about -18 dBm and consumes 195.4 mW of DC power. The measured phase noise is -93.64 dBc/Hz at the 1-MHz offset of the 78.13-GHz carrier frequency, which is even lower phase noise characteristic than the ×6 frequency multiplier based transmitter chip.Chapter 1. Introduction 1 1.1 Types and Applications of Automotive Radars 2 1.1 Research Strategy 7 Chapter 2. Frequency and Architecture selection 12 2.1 LiT VCO 14 2.2 Class-C VCO 19 2.3 Injection-Locked Oscillator Chain 24 2.4 Summary 29 Chapter 3. 77-GHz FMCW Radar Transmitter with 12.8-GHz PLL and 6 Frequency Multiplier 30 3.1 Proposed LiT VCO 33 3.2 6 Multiplier and Power Amplifier 40 3.3 Measurement Results 46 3.3.1 LiT VCO Measurement Results 46 3.3.2 77-GHz Transmitter (v1) Measurement Results 49 3.4 Summary 60 Chapter 4. 77-GHz FMCW Radar Transmitter with 2.75-GHz PLL and 28 Frequency Multiplier 62 4.1 Proposed class-C VCO 65 4.2 28 Multiplier and Power Amplifier 73 4.3 Measurement Results 80 4.3.1 Class-C VCO Measurement Results 80 4.3.2 77-GHz Transmitter (v2) Measurement Results 83 4.4 Summary 90 Chapter 5. Conclusion 92 Bibliography 94 Abstract 97Docto

Advanced CMOS Integrated Circuit Design and Application

The recent development of various application systems and platforms, such as 5G, B5G, 6G, and IoT, is based on the advancement of CMOS integrated circuit (IC) technology that enables them to implement high-performance chipsets. In addition to development in the traditional fields of analog and digital integrated circuits, the development of CMOS IC design and application in high-power and high-frequency operations, which was previously thought to be possible only with compound semiconductor technology, is a core technology that drives rapid industrial development. This book aims to highlight advances in all aspects of CMOS integrated circuit design and applications without discriminating between different operating frequencies, output powers, and the analog/digital domains. Specific topics in the book include: Next-generation CMOS circuit design and application; CMOS RF/microwave/millimeter-wave/terahertz-wave integrated circuits and systems; CMOS integrated circuits specially used for wireless or wired systems and applications such as converters, sensors, interfaces, frequency synthesizers/generators/rectifiers, and so on; Algorithm and signal-processing methods to improve the performance of CMOS circuits and systems

SiGe-based broadband and high suppression frequency doubler ICs for wireless communications

制度:新 ; 報告番号:甲3419号 ; 学位の種類:博士(工学) ; 授与年月日:2011/9/15 ; 早大学位記番号:新574

Millimeter-wave Communication and Radar Sensing — Opportunities, Challenges, and Solutions

With the development of communication and radar sensing technology, people are able to seek for a more convenient life and better experiences. The fifth generation (5G) mobile network provides high speed communication and internet services with a data rate up to several gigabit per second (Gbps). In addition, 5G offers great opportunities of emerging applications, for example, manufacture automation with the help of precise wireless sensing. For future communication and sensing systems, increasing capacity and accuracy is desired, which can be realized at millimeter-wave spectrum from 30 GHz to 300 GHz with several tens of GHz available bandwidth. Wavelength reduces at higher frequency, this implies more compact transceivers and antennas, and high sensing accuracy and imaging resolution. Challenges arise with these application opportunities when it comes to realizing prototype or demonstrators in practice. This thesis proposes some of the solutions addressing such challenges in a laboratory environment.High data rate millimeter-wave transmission experiments have been demonstrated with the help of advanced instrumentations. These demonstrations show the potential of transceiver chipsets. On the other hand, the real-time communication demonstrations are limited to either low modulation order signals or low symbol rate transmissions. The reason for that is the lack of commercially available high-speed analog-to-digital converters (ADCs); therefore, conventional digital synchronization methods are difficult to implement in real-time systems at very high data rates. In this thesis, two synchronous baseband receivers are proposed with carrier recovery subsystems which only require low-speed ADCs [A][B].Besides synchronization, high-frequency signal generation is also a challenge in millimeter-wave communications. The frequency divider is a critical component of a millimeter-wave frequency synthesizer. Having both wide locking range and high working frequencies is a challenge. In this thesis, a tunable delay gated ring oscillator topology is proposed for dual-mode operation and bandwidth extension [C]. Millimeter-wave radar offers advantages for high accuracy sensing. Traditional millimeter-wave radar with frequency-modulated continuous-wave (FMCW), or continuous-wave (CW), all have their disadvantages. Typically, the FMCW radar cannot share the spectrum with other FMCW radars.\ua0 With limited bandwidth, the number of FMCW radars that could coexist in the same area is limited. CW radars have a limited ambiguous distance of a wavelength. In this thesis, a phase-modulated radar with micrometer accuracy is presented [D]. It is applicable in a multi-radar scenario without occupying more bandwidth, and its ambiguous distance is also much larger than the CW radar. Orthogonal frequency-division multiplexing (OFDM) radar has similar properties. However, its traditional fast calculation method, fast Fourier transform (FFT), limits its measurement accuracy. In this thesis, an accuracy enhancement technique is introduced to increase the measurement accuracy up to the micrometer level [E]

Millimeter-Scale and Energy-Efficient RF Wireless System

This dissertation focuses on energy-efficient RF wireless system with millimeter-scale dimension, expanding the potential use cases of millimeter-scale computing devices. It is challenging to develop RF wireless system in such constrained space. First, millimeter-sized antennae are electrically-small, resulting in low antenna efficiency. Second, their energy source is very limited due to the small battery and/or energy harvester. Third, it is required to eliminate most or all off-chip devices to further reduce system dimension. In this dissertation, these challenges are explored and analyzed, and new methods are proposed to solve them. Three prototype RF systems were implemented for demonstration and verification. The first prototype is a 10 cubic-mm inductive-coupled radio system that can be implanted through a syringe, aimed at healthcare applications with constrained space. The second prototype is a 3x3x3 mm far-field 915MHz radio system with 20-meter NLOS range in indoor environment. The third prototype is a low-power BLE transmitter using 3.5x3.5 mm planar loop antenna, enabling millimeter-scale sensors to connect with ubiquitous IoT BLE-compliant devices. The work presented in this dissertation improves use cases of millimeter-scale computers by presenting new methods for improving energy efficiency of wireless radio system with extremely small dimensions. The impact is significant in the age of IoT when everything will be connected in daily life.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/147686/1/yaoshi_1.pd

Analysis and Design of a Sub-THz Ultra-Wideband Phased-Array Transmitter

This thesis investigates circuits and systems for broadband high datarate transmitter systems in the millimeter-wave (mm-wave) spectrum. During the course of this dissertation, the design process and characterization of a power efficient and wideband binary phase-shift keying (BPSK) transmitter integrated circuit (IC) with local oscillator (LO) frequency multiplication and 360° phase control for beam steering is studied. All required circuit blocks are designed based on the theoretical analysis of the underlying principles, optimized, fabricated and characterized in the research laboratory targeting low power consumption, high efficiency and broadband operation. The phase-controlled push-push (PCPP) architecture enabling frequency multiplication by four in a single stage is analytically studied and characterized finding an optimum between output power and second harmonic suppression depending on the input amplitude. A PCPP based LO chain is designed. A circuit is fabricated establishing the feasibility of this architecture for operation at more than 200 GHz. Building on this, a second circuit is designed, which produces among the highest saturated output powers at 2 dBm. At less than 100 mW of direct current (DC) power consumption, this results in a power-added efficiency (PAE) of 1.6 % improving the state of the art by almost 30 %. Phase-delayed and time-delayed approaches to beam steering are analyzed, identifying and discussing design challenges like area consumption, signal attenuation and beam squint. A 60 GHz active vector-sum phase-shifter with high gain of 11.3 dB and output power of 5 dBm, improving the PAE of the state of the art by a factor of 30 achieving 6.29 %, is designed. The high gain is possible due to an optimization of the orthogonal signal creation stage enabled by studying and comparing different architectures leading to a trade off of lower signal attenuation for higher area consumption in the chosen electromagnetic coupler. By combining this with a frequency quadrupler, a phase steering enabled LO chain for operation at 220 GHz is created and characterized, confirming the preceding analysis of the phase-frequency relation during multiplication. It achieves a power gain of 21 dB, outperforming comparable designs by 25 dB. This allows the combination of phase control, frequency multiplication and pre-amplification. The radio frequency (RF) efficiency is increased 40-fold to 0.99 %, with a total power consumption of 105 mW. Motivated by the distorting effect of beam squint in phase-delayed broadband array systems, a novel analog hybrid beam steering architecture is devised, combining phase-delayed and time-delayed steering with the goal of reducing the beam squint of phase-delayed systems and large area consumption of time-delayed circuits. An analytical design procedure is presented leading to the research finding of a beam squint reduction potential of more than 83 % in an ideal system. Here, the increase in area consumption is outweighed by the reduction in beam squint. An IC with a low power consumption of 4.3 mW has been fabricated and characterized featuring the first time delay circuit operating at above 200 GHz. By producing most of the beam direction by means of time delay the beam squinting can be reduced by more than 75 % in measurements while the subsequent phase shifter ensures continuous beam direction control. Together, the required silicon area can be reduced to 43 % compared to timedelayed systems in the same frequency range. Based on studies of the optimum signal feeding and input matching of a Gilbert cell, an ultra-wideband, low-power mixer was designed. A bandwidth of more than 100 GHz was achieved exceeding the state of the art by 23 %. With a conversion gain of –13 dB, this enables datarates of more than 100 Gbps in BPSK operation. The findings are consolidated in an integrated transmitter operating around 246 GHz doubling the highest published measured datarates of transmitters with LO chain and power amplifier in BPSK operation to 56 Gbps. The resulting transmitter efficiency of 7.4 pJ/bit improves the state of the art by 70 % and 50 % over BPSK and quadrature phaseshift keying (QPSK) systems, respectively. Together, the results of this work form the basis for low-power and efficient next-generation wireless applications operating at many times the datarates available today.:Abstract 3 Zusammenfassung 5 List of Symbols 11 List of Acronyms 17 Prior Publications 19 1. Introduction 21 1.1. Motivation........................... 21 1.2. Objective of this Thesis ................... 25 1.3. Structure of this Thesis ................... 27 2. Overview of Employed Technologies and Techniques 29 2.1. IntegratedCircuitTechnology................ 29 2.2. Transmission Lines and Passive Structures . . . . . . . . 35 2.3. DigitalModulation ...................... 41 3. Frequency Quadrupler 45 3.1. Theoretical Analysis of Frequency Multiplication Circuits 45 3.2. Phase-Controlled Push-Push Principle for Frequency Quadrupling.......................... 49 3.3. Stand-alone Phase-Controlled Push-Push Quadrupler . 60 3.4. Phase-Controlled Push-Push Quadrupler based LO-chain with High Output Power ............... 72 9 4. Array Systems and Dynamic Beam Steering 91 4.1. Theoretical Analysis of BeamSteering. . . . . . . . . . . 95 4.2. Local Oscillator Phase Shifting with Vector-Modulator PhaseShifters......................... 107 4.3. Hybrid True-Time and Phase-Delayed Beam Steering . 131 5. Ultra-Wide Band Modulator for BPSK Operation 155 6. Broadband BPSK Transmitter System for Datarates up to 56 Gbps 167 6.1. System Architecture ..................... 168 6.2. Measurement Technique and Results . . . . . . . . . . . 171 6.3. Summary and performance comparison . . . . . . . . . 185 7. Conclusion and Outlook 189 A. Appendix 195 Bibliography 199 List of Figures 227 Note of Thanks 239 Curriculum Vitae 241Diese Dissertation untersucht Schaltungen und Systeme für breitbandige Transmittersysteme mit hoher Datenrate im Millimeterwellen (mm-wave) Spektrum. Im Rahmen dieser Arbeit werden der Entwurfsprozess und die Charakterisierung eines leistungseffizienten und breitbandigen integrierten Senders basierend auf binärer Phasenumtastung (BPSK) mit Frequenzvervielfachung des Lokaloszillatorsignals und 360°-Phasenkontrolle zur Strahlsteuerung untersucht. Alle erforderlichen Schaltungsblöcke werden auf Grundlage von theoretischen Analysen der zugrundeliegenden Prinzipien entworfen, optimiert, hergestellt und im Forschungslabor charakterisiert, mit den Zielen einer niedrigen Leistungsaufnahme, eines hohen Wirkungsgrades und einer möglichst großen Bandbreite. Die phasengesteuerte Push-Push (PCPP)-Architektur, welche eine Frequenzvervierfachung in einer einzigen Stufe ermöglicht, wird analytisch untersucht und charakterisiert. Dabei wird ein Optimum zwischen Ausgangsleistung und Unterdrückung der zweiten Harmonischen des Eingangssignals in Abhängigkeit von der Eingangsamplitude gefunden. Es wird eine LO-Kette auf PCPP-Basis entworfen. Eine Schaltung wird präsentiert, die die Machbarkeit dieser Architektur für den Betrieb bei mehr als 200 GHz nachweist. Darauf aufbauend wird eine zweite Schaltung entworfen, die mit 2 dBm eine der höchsten publizierten gesättigten Ausgangsleistungen erzeugt. Mit einer Leistungsaufnahme von weniger als 100mW ergibt sich ein Leistungswirkungsgrad (PAE) von 1.6 %, was den Stand der Technik um fast 30 % verbessert. Es werden phasenverzögerte und zeitverzögerte Ansätze zur Steuerung der Strahlrichtung analysiert, wobei Entwicklungsherausforderungen wie Flächenverbrauch, Signaldämpfung und Strahlschielen identifiziert und diskutiert werden. Ein aktiver Vektorsummen-Phasenschieber mit hoher Verstärkung von 11.3 dB und einer Ausgangsleistung von 5 dBm, der mit einer PAE von 6.29 % den Stand der Technik um den Faktor 30 verbessert, wird entworfen. Die hohe Verstärkung ist zum Teil auf eine Optimierung der orthogonalen Signalerzeugungsstufe zurückzuführen, die durch die Untersuchung und den Vergleich verschiedener Architekturen ermöglicht wird. Bei der Entscheidung für einen elektromagnetischen Koppler rechtfertigt die geringere Signaldämpfung einen höheren Flächenverbrauch. Durch die Kombination mit einem Frequenzvervierfacher wird eine LO-Kette mit Phasensteuerung für den Betrieb bei 220 GHz geschaffen und charakterisiert, was die vorangegangene Analyse der Phasen-FrequenzBeziehung während der Multiplikation bestätigt. Sie erreicht einen Leistungsgewinn von 21 dB und übertrifft damit vergleichbare Designs um 25dB. Dies ermöglicht die Kombination von Phasensteuerung, Frequenzvervielfachung und Vorverstärkung. Der HochfrequenzWirkungsgrad wird um das 40-fache auf 0.99 % bei einer Gesamtleistungsaufnahme von 105 mW gesteigert. Motiviert durch den verzerrenden Effekt des Strahlenschielens in phasengesteuerten Breitbandarraysystemen, wird eine neuartige analoge hybride Strahlsteuerungsarchitektur untersucht, die phasenverzögerte und zeitverzögerte Steuerung kombiniert. Damit wird sowohl das Strahlenschielen phasenverzögerter Systeme als auch der große Flächenverbrauch zeitverzögerter Schaltungen reduziert. Es wird ein analytisches Entwurfsverfahren vorgestellt, das zu dem Forschungsergebnis führt, dass in einem idealen System ein Potenzial zur Reduktion des Strahlenschielens von mehr als 83 % besteht. Dabei wird die Zunahme des Flächenverbrauchs durch die Verringerung des Strahlenschielens aufgewogen. Es wird ein IC mit einer geringen Leistungsaufnahme von 4.3mW hergestellt und charakterisiert. Dabei wird die erste Zeitverzögerungsschaltung entworfen, die bei über 200 GHz arbeitet. Durch die Erzeugung eines Großteils der Strahlrichtung mittels Zeitverzögerung kann das Schielen des Strahls bei Messungen um mehr als 75% reduziert werden, während der nachfolgende Phasenschieber eine kontinuierliche Steuerung der Strahlrichtung gewährleistet. Insgesamt kann die benötigte Siliziumfläche im Vergleich zu zeitverzögerten Systemen im gleichen Frequenzbereich auf 43 % reduziert werden. Auf der Grundlage von Studien zur optimalen Signaleinspeisung und Eingangsanpassung einer Gilbert-Zelle wird ein Ultrabreitband-Mischer mit geringem Stromverbrauch entworfen. Dieser erreicht eine Ausgangsbandbreite von mehr als 100 GHz, die den Stand der Technik um 23% übertrifft. Bei einer Wandlungsverstärkung von –13dB ermöglicht dies Datenraten von mehr als 100 Gbps im BPSK-Betrieb. Die Erkenntnisse werden in einem integrierten, breitbandigen Sender konsolidiert, der um 246 GHz arbeitet und die höchsten veröffentlichten gemessenen Datenraten für Sender mit LO-Signalkette und Leistungsverstärker im BPSK-Betrieb auf 56 Gbps verdoppelt. Die daraus resultierende Transmitter-Effizienz von 7.4 pJ/bit verbessert den Stand der Technik um 70 % bzw. 50 % gegenüber BPSKund Quadratur Phasenumtastung (QPSK)-Systemen. Zusammen bilden die Ergebnisse dieser Arbeit die Grundlage für stromsparende, effiziente, mobile Funkanwendungen der nächsten Generation mit einem Vielfachen der heute verfügbaren Datenraten.:Abstract 3 Zusammenfassung 5 List of Symbols 11 List of Acronyms 17 Prior Publications 19 1. Introduction 21 1.1. Motivation........................... 21 1.2. Objective of this Thesis ................... 25 1.3. Structure of this Thesis ................... 27 2. Overview of Employed Technologies and Techniques 29 2.1. IntegratedCircuitTechnology................ 29 2.2. Transmission Lines and Passive Structures . . . . . . . . 35 2.3. DigitalModulation ...................... 41 3. Frequency Quadrupler 45 3.1. Theoretical Analysis of Frequency Multiplication Circuits 45 3.2. Phase-Controlled Push-Push Principle for Frequency Quadrupling.......................... 49 3.3. Stand-alone Phase-Controlled Push-Push Quadrupler . 60 3.4. Phase-Controlled Push-Push Quadrupler based LO-chain with High Output Power ............... 72 9 4. Array Systems and Dynamic Beam Steering 91 4.1. Theoretical Analysis of BeamSteering. . . . . . . . . . . 95 4.2. Local Oscillator Phase Shifting with Vector-Modulator PhaseShifters......................... 107 4.3. Hybrid True-Time and Phase-Delayed Beam Steering . 131 5. Ultra-Wide Band Modulator for BPSK Operation 155 6. Broadband BPSK Transmitter System for Datarates up to 56 Gbps 167 6.1. System Architecture ..................... 168 6.2. Measurement Technique and Results . . . . . . . . . . . 171 6.3. Summary and performance comparison . . . . . . . . . 185 7. Conclusion and Outlook 189 A. Appendix 195 Bibliography 199 List of Figures 227 Note of Thanks 239 Curriculum Vitae 24

Wireless wire - ultra-low-power and high-data-rate wireless communication systems

With the rapid development of communication technologies, wireless personal-area communication systems gain momentum and become increasingly important. When the market gets gradually saturated and the technology becomes much more mature, new demands on higher throughput push the wireless communication further into the high-frequency and high-data-rate direction. For example, in the IEEE 802.15.3c standard, a 60-GHz physical layer is specified, which occupies the unlicensed 57 to 64 GHz band and supports gigabit links for applications such as wireless downloading and data streaming. Along with the progress, however, both wireless protocols and physical systems and devices start to become very complex. Due to the limited cut-off frequency of the technology and high parasitic and noise levels at high frequency bands, the power consumption of these systems, especially of the RF front-ends, increases significantly. The reason behind this is that RF performance does not scale with technology at the same rate as digital baseband circuits. Based on the challenges encountered, the wireless-wire system is proposed for the millimeter wave high-data-rate communication. In this system, beamsteering directional communication front-ends are used, which confine the RF power within a narrow beam and increase the level of the equivalent isotropic radiation power by a factor equal to the number of antenna elements. Since extra gain is obtained from the antenna beamsteering, less front-end gain is required, which will reduce the power consumption accordingly. Besides, the narrow beam also reduces the interference level to other nodes. In order to minimize the system average power consumption, an ultra-low power asynchronous duty-cycled wake-up receiver is added to listen to the channel and control the communication modes. The main receiver is switched on by the wake-up receiver only when the communication is identified while in other cases it will always be in sleep mode with virtually no power consumed. Before transmitting the payload, the event-triggered transmitter will send a wake-up beacon to the wake-up receiver. As long as the wake-up beacon is longer than one cycle of the wake-up receiver, it can be captured and identified. Furthermore, by adopting a frequency-sweeping injection locking oscillator, the wake-up receiver is able to achieve good sensitivity, low latency and wide bandwidth simultaneously. In this way, high-data-rate communication can be achieved with ultra-low average power consumption. System power optimization is achieved by optimizing the antenna number, data rate, modulation scheme, transceiver architecture, and transceiver circuitries with regards to particular application scenarios. Cross-layer power optimization is performed as well. In order to verify the most critical elements of this new approach, a W-band injection-locked oscillator and the wake-up receiver have been designed and implemented in standard TSMC 65-nm CMOS technology. It can be seen from the measurement results that the wake-up receiver is able to achieve about -60 dBm sensitivity, 10 mW peak power consumption and 8.5 µs worst-case latency simultaneously. When applying a duty-cycling scheme, the average power of the wake-up receiver becomes lower than 10 µW if the event frequency is 1000 times/day, which matches battery-based or energy harvesting-based wireless applications. A 4-path phased-array main receiver is simulated working with 1 Gbps data rate and on-off-keying modulation. The average power consumption is 10 µW with 10 Gb communication data per day

Frequency Synthesizers and Oscillator Architectures Based on Multi-Order Harmonic Generation

Frequency synthesizers are essential components for modern wireless and wireline communication systems as they provide the local oscillator signal required to transmit and receive data at very high rates. They are also vital for computing devices and microcontrollers as they generate the clocks required to run all the digital circuitry responsible for the high speed computations. Data rates and clocking speeds are continuously increasing to accommodate for the ever growing demand on data and computational power. This places stringent requirements on the performance metrics of frequency synthesizers. They are required to run at higher speeds, cover a wide range of frequencies, provide a low jitter/phase noise output and consume minimum power and area. In this work, we present new techniques and architectures for implementing high speed frequency synthesizers which fulfill the aforementioned requirements. We propose a new architecture and design approach for the realization of wideband millimeter-wave frequency synthesizers. This architecture uses two-step multi-order harmonic generation of a low frequency phase-locked signal to generate wideband mm-wave frequencies. A prototype of the proposed system is designed and fabricated in 90nm Complementary Metal Oxide Semiconductor (CMOS) technology. Measurement results demonstrated that a very wide tuning range of 5 to 32 GHz can be achieved, which is costly to implement using conventional techniques. Moreover the power consumption per octave resembles that of state-of-the art reports. Next, we propose the N-Push cyclic coupled ring oscillator (CCRO) architecture to implement two high performance oscillators: (1) a wideband N-Push/M-Push CCRO operating from 3.16-12.8GHz implemented by two harmonic generation operations using the availability of different phases from the CCRO, and (2) a 13-25GHz millimeter-wave N-Push CCRO with a low phase noise performance of -118dBc/Hz at 10MHz. The proposed oscillators achieve low phase noise with higher FOM than state of the art work. Finally, we present some improvement techniques applied to the performance of phase locked loops (PLLs). We present an adaptive low pass filtering technique which can reduce the reference spur of integer-N charge-pump based PLLs by around 20dB while maintaining the settling time of the original PLL. Another PLL is presented, which features very low power consumption targeting the Medical Implantable Communication Standard. It operates at 402-405 MHz while consuming 600microW from a 1V supply

A III-V-on-Si ultra-dense comb laser

Optical frequency combs emerge as a promising technology that enables highly sensitive, near-real-time spectroscopy with a high resolution. The currently available comb generators are mostly based on bulky and high-cost femtosecond lasers for dense comb generation (line spacing in the range of 100 MHz to 1 GHz). However, their integrated and low-cost counterparts, which are integrated semiconductor mode-locked lasers, are limited by their large comb spacing, small number of lines and broad optical linewidth. In this study, we report a demonstration of a III-V-on-Si comb laser that can function as a compact, low-cost frequency comb generator after frequency stabilization. The use of low-loss passive silicon waveguides enables the integration of a long laser cavity, which enables the laser to be locked in the passive mode at a record-low 1 GHz repetition rate. The 12-nm 10-dB output optical spectrum and the notably small optical mode spacing results in a dense optical comb that consists of over 1400 equally spaced optical lines. The sub-kHz 10-dB radio frequency linewidth and the narrow longitudinal mode linewidth (<400 kHz) indicate notably stable mode-locking. Such integrated dense comb lasers are very promising, for example, for high-resolution and real-time spectroscopy applications