2,315 research outputs found

    Analysis of an On-Line Stability Monitoring Approach for DC Microgrid Power Converters

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    An online approach to evaluate and monitor the stability margins of dc microgrid power converters is presented in this paper. The discussed online stability monitoring technique is based on the Middlebrook's loop-gain measurement technique, adapted to the digitally controlled power converters. In this approach, a perturbation is injected into a specific digital control loop of the converter and after measuring the loop gain, its crossover frequency and phase margin are continuously evaluated and monitored. The complete analytical derivation of the model, as well as detailed design aspects, are reported. In addition, the presence of multiple power converters connected to the same dc bus, all having the stability monitoring unit, is also investigated. An experimental microgrid prototype is implemented and considered to validate the theoretical analysis and simulation results, and to evaluate the effectiveness of the digital implementation of the technique for different control loops. The obtained results confirm the expected performance of the stability monitoring tool in steady-state and transient operating conditions. The proposed method can be extended to generic control loops in power converters operating in dc microgrids

    Discrete time control of a push-pull power converter

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    The objective is the design of a discrete time controller in a push-pull power converter. The work figures out the issues related to the migration of the analog control to the digital one in power converters and both simulation and experimental results are performed to obtain a comparative evaluation of both proposals.This work apply digital control techniques in a DC/DC push-pull power converter. Sections include converter modelization, control design, simulations, implementation and experimental results

    Current sensorless power factor correction based on digital current rebuilding

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    A new digital control technique for power factor correction is presented. The main novelty of the method is that there is no current sensor. Instead, the input current is digitally rebuilt, using the estimated input current for the current loop. Apart from that, the ADCs used for the acquisition of the input and output voltages have been designed ad-hoc. Taking advantage of the slow dynamic behavior of these voltages, almost completely digital ADCs have been designed, leaving only a comparator and an RC filter in the analog part. The final objective is obtaining a low cost digital controller which can be easily integrated in an ASIC along with the controller of paralleled and subsequent power section

    Power factor correction without current sensor based on digital current rebuilding

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    Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. F. J. Azcondo, Á. de Castro, V. M. López, Ó. García, "Power Factor Correction Without Current Sensor Based on Digital Current Rebuilding", IEEE Transactions on Power Electronics, vol. 25, no. 6, pp. 1527 - 1536, June 2010.A new digital control technique for power factor (PF) correction is presented. The main novelty of the method is that there is no current sensor. Instead, the input current is digitally rebuilt, using the estimated input current in the current loop. The circuit measures the input and output voltage by means of low cost ad hoc analog-to-digital converters (ADCs). Taking advantage of the slow dynamic behavior of these voltages, almost completely digital ADCs have been designed, leaving only a comparator and an RC filter in the analog part. Avoiding measuring current can provide a significant advantage compared to analog controllers and this also helps to reduce the total cost. The ultimate objective is to obtain a low-cost digital controller that can be easily integrated as an intellectual property (IP) block into a field-programmable gate array, or an application-specific integrated circuit. The experimental results show a reasonably high PF, despite not measuring the input current, and therefore the feasibility of the method.This work has been funded by the Spanish Government with the project TEC2008-01753 entitled: “Digital power processing for the control of gaseous discharges”

    Pre-calculated duty cycle control implemented in FPGA for power factor correction

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    Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. A. García Ávila Fernández, Á de Castro, Ó. Muñoz García, and F. J. Azcondo, "Pre-calculated duty cycle control implemented in FPGA for power factor correction", 35th Annual Conference of IEEE Industrial Electronics, 2009. IECON '09, Porto (Portugal), 2009, pp. 2955 - 2960A power factor correction (PFC) technique based on pre-calculated duty cycle values is presented in this paper. In this method the duty ratios for half a line period are calculated in advance and stored in a memory. By synchronizing the memory with the line, near unity power factors can be achieved in a specific operating point. The main advantage of this technique is that neither current measurement nor current loop are needed. To obtain stable output voltages a voltage loop is included. A boost converter prototype controlled by an FPGA evaluation board has been implemented in order to verify the functionality of the proposed method. Both the simulation and experimental results show that near unity power factor can be achieved with this PFC strategy

    Pre-Calculated Duty Cycle Control Implemented in FPGA for Power Factor Correction

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    A power factor correction (PFC) technique based on pre-calculated duty cycle values is presented in this paper. In this method the duty ratios for half a line period are calculated in advance and stored in a memory. By synchronizing the memory with the line, near unity power factors can be achieved in a specific operating point. The main advantage of this technique is that neither current measurement nor current loop are needed. To obtain stable output voltages a voltage loop is included. A boost converter prototype controlled by an FPGA evaluation board has been implemented in order to verify the functionality of the proposed method. Both the simulation and experimental results show that near unity power factor can be achieved with this PFC strategy

    Effect of Sensors on the Reliability and Control Performance of Power Circuits in the Web of Things (WoT)

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    In order to realize a true WoT environment, a reliable power circuit is required to ensure interconnections among a range of WoT devices. This paper presents research on sensors and their effects on the reliability and response characteristics of power circuits in WoT devices. The presented research can be used in various power circuit applications, such as energy harvesting interfaces, photovoltaic systems, and battery management systems for the WoT devices. As power circuits rely on the feedback from voltage/current sensors, the system performance is likely to be affected by the sensor failure rates, sensor dynamic characteristics, and their interface circuits. This study investigated how the operational availability of the power circuits is affected by the sensor failure rates by performing a quantitative reliability analysis. In the analysis process, this paper also includes the effects of various reconstruction and estimation techniques used in power processing circuits (e.g., energy harvesting circuits and photovoltaic systems). This paper also reports how the transient control performance of power circuits is affected by sensor interface circuits. With the frequency domain stability analysis and circuit simulation, it was verified that the interface circuit dynamics may affect the transient response characteristics of power circuits. The verification results in this paper showed that the reliability and control performance of the power circuits can be affected by the sensor types, fault tolerant approaches against sensor failures, and the response characteristics of the sensor interfaces. The analysis results were also verified by experiments using a power circuit prototype.This work was supported by the 2013 Yeungnam University Research Grant

    Energy Saving Drives New Approaches to Telecommunications Power System

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    Adaptive Efficiency Optimization For Digitally Controlled Dc-dc Converters

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    The design optimization of DC-DC converters requires the optimum selection of several parameters to achieve improved efficiency and performance. Some of these parameters are load dependent, line dependent, components dependent, and/or temperature dependent. Designing such parameters for a specific load, input and output, components, and temperature may improve single design point efficiency but will not result in maximum efficiency at different conditions, and will not guarantee improvement at that design point because of the components, temperature, and operating point variations. The ability of digital controllers to perform sophisticated algorithms makes it easy to apply adaptive control, where system parameters can be adaptively adjusted in response to system behavior in order to achieve better performance and stability. The use of adaptive control for power electronics is first applied with the Adaptive Frequency Optimization (AFO) method, which presents an auto-tuning adaptive digital controller with maximum efficiency point tracking to optimize DC-DC converter switching frequency. The AFO controller adjusts the DC-DC converter switching frequency while tracking the converter minimum input power point, under variable operating conditions, to find the optimum switching frequency that will result in minimum total loss and thus the maximum efficiency. Implementing variable switching frequencies in digital controllers introduces two main issues, namely, limit cycle oscillation and system instability. Dynamic Limit Cycle Algorithms (DLCA) is a dynamic technique tailored to improve system stability and to reduce limit cycle oscillation under variable switching frequency operation. The convergence speed and stability of AFO algorithm is further improved by presenting the analysis and design of a digital controller with adaptive auto-tuning algorithm that has a variable step size to track and detect the optimum switching frequency for a DC-DC converter. The Variable-Step-Size (VSS) algorithm is theoretically analyzed and developed based on buck DC-DC converter loss model and directed towered improving the convergence speed and accuracy of AFO adaptive loop by adjusting the converter switching frequency with variable step size. Finally, the efficiency of DC-DC converters is a function of several variables. Optimizing single variable alone may not result in maximum or global efficiency point. The issue of adjusting more than one variable at the same time is addressed by the Multivariable Adaptive digital Controller (MVAC). The MVAC is an adaptive method that continuously adjusts the DC-DC converter switching frequency and dead-time at the same time, while tracking the converter minimum input power, to find the maximum global efficiency point under variable conditions. In this research work, all adaptive methods were discussed, theoretically analyzed and its digital control algorithm along with experimental implementations were presented
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