FE tool for drape modelling and resin pocket prediction of fully embedded optical fiber sensor system

This work highlights some of the achievements obtained within the EU FP7 SmartFiber project, aiming to develop a fully embeddable optical fiber sensor system including the interrogator chip. The focus is on resolving issues holding back the industrial uptake of optical sensing technology. In a first section, the development of a placement head for automated lay-down of an optical sensor line (including the SmartFiber interrogator system) during composite manufacturing is discussed. In a second section, the attention is shifted to the occurrence of resin pockets surrounding inclusions such as the SmartFiber interrogator. A computationally efficient F.E. approach is presented capable of accurately predicting resin pocket geometries. Both small (i.e. optical fiber sensors) and large (i.e. the SmartFiber interrogator) inclusions are considered, and the F.E. predictions are validated with experimental observations

Two-dimensional placement compaction using an evolutionary approach: a study

The placement problem of two-dimensional objects over planar surfaces optimizing given utility functions is a combinatorial optimization problem. Our main drive is that of surveying genetic algorithms and hybrid metaheuristics in terms of final positioning area compaction of the solution. Furthermore, a new hybrid evolutionary approach, combining a genetic algorithm merged with a non-linear compaction method is introduced and compared with referenced literature heuristics using both randomly generated instances and benchmark problems. A wide variety of experiments is made, and the respective results and discussions are presented. Finally, conclusions are drawn, and future research is defined

Using One-Dimensional Compaction for Smaller Graph Drawings

We review the technique of one-dimensional compaction and use it as part of two new methods tackling problems in the context of automatic diagram layout: First, a postprocessing of the layer-based layout algorithm, also known as Sugiyama layout, and second a placement algorithm for connected components with external extensions. We apply our methods to dataflow diagrams from practical applications and find that the first method significantly reduces the width of left-to-right drawn diagrams. The second method allows to properly arrange disconnected graphs that have hierarchycrossing edges. Keywords: one-dimensional compaction, diagram layout, layer-based layout, Sugiyama layout, disconnected graphs, dataflow diagram

An integrated placement and routing approach

As the feature size continues scaling down, interconnects become the major contributor of signal delay. Since interconnects are mainly determined by placement and routing, these two stages play key roles to achieve high performance. Historically, they are divided into two separate stages to make the problem tractable. Therefore, the routing information is not available during the placement process. Net models such as HPWL, are employed to approximate the routing to simplify the placement problem. However, the good placement in terms of these objectives may not be routable at all in the routing stage because different objectives are optimized in placement and routing stages. This inconsistancy makes the results obtained by the two-step optimization method far from optimal;In order to achieve high-quality placement solution and ensure the following routing, we propose an integrated placement and routing approach. In this approach, we integrate placement and routing into the same framework so that the objective optimized in placement is the same as that in routing. Since both placement and routing are very hard problems (NP-hard), we need to have very efficient algorithms so that integrating them together will not lead to intractable complexity;In this dissertation, we first develop a highly efficient placer - FastPlace 3.0 for large-scale mixed-size placement problem. Then, an efficient and effective detailed placer - FastDP is proposed to improve global placement by moving standard cells in designs. For high-degree nets in designs, we propose a novel performance-driven topology design algorithm to generate good topologies to achieve very strict timing requirement. In the routing phase, we develop two global routers, FastRoute and FastRoute 2.0. Compared to traditional global routers, they can generate better solutions and are two orders of magnitude faster. Finally, based on these efficient and high-quality placement and routing algorithms, we propose a new flow which integrates placement and routing together closely. In this flow, global routing is extensively applied to obtain the interconnect information and direct the placement process. In this way, we can get very good placement solutions with guaranteed routability