On-chip Spiral Inductor/transformer Design And Modeling For Rf Applications

Passive components are indispensable in the design and development of microchips for high-frequency applications. Inductors in particular are used frequently in radio frequency (RF) IC\u27s such as low-noise amplifiers and oscillators. High performance inductor has become one of the critical components for voltage controlled oscillator (VCO) design, for its quality factor (Q) value directly affects the VCO phase noise. The optimization of inductor layout can improve its performance, but the improvement is limited by selected technology. Inductor performance is bounded by the thin routing metal and small distance from lossy substrate. On the other hand, the in-accurate inductor modeling further limits the optimization process. The on-chip inductor has been an important research topic since it was first proposed in early 1990\u27s. Significant amount of study has been accomplished and reported in literature; whereas some methods have been used in industry, but not released to public. It is of no doubt that a comprehensive solution is not exist yet. A comprehensive study of previous will be first address. Later author will point out the in-adequacy of skin effect and proximity effect as cause of current crowding in the inductor metal. A model method embedded with new explanation of current crowding is proposed and its applicability in differential inductor and balun is validated. This study leads to a robust optimization routine to improve inductor performance without any addition technology cost and development

An Overview of Fully Integrated Switching Power Converters Based on Switched-Capacitor versus Inductive Approach and Their Advanced Control Aspects

This paper reviews and discusses the state of the art of integrated switched-capacitor and integrated inductive power converters and provides a perspective on progress towards the realization of efficient and fully integrated DC–DC power conversion. A comparative assessment has been presented to review the salient features in the utilization of transistor technology between the switched-capacitor and switched inductor converter-based approaches. First, applications that drive the need for integrated switching power converters are introduced, and further implementation issues to be addressed also are discussed. Second, different control and modulation strategies applied to integrated switched-capacitor (voltage conversion ratio control, duty cycle control, switching frequency modulation, Ron modulation, and series low drop out) and inductive converters (pulse width modulation and pulse frequency modulation) are then discussed. Finally, a complete set of integrated power converters are related in terms of their conditions and operation metrics, thereby allowing a categorization to provide the suitability of converter technologies

Design and modeling of integrated octagonal shape inductor with substrate silicon in a buck converter

The paper discusses the design and modeling of an integrate octagonal shaped inductor with silicon substrate. A validated equivalent electrical model of the integrated octagonal shaped spiral inductor is developed. The model is used to analyze and evaluate the quality factor and the inductance of the inductor structure proposed under different physical parameters setting. These include the number of turns, spacing between turns and the inner diameter. The simulation results show that an appropriate selection of physic a parameters can achieve an enhanced quality factor and improved inductance. PSIM simulator is used for the implementation of the integrated inductor in a micro buck converter. The simulation results demonstrate that our proposals are very promising approaches for the monolithic integration of DC-DC converters

Ultra Small Antenna and Low Power Receiver for Smart Dust Wireless Sensor Networks

Wireless Sensor Networks have the potential for profound impact on our daily lives. Smart Dust Wireless Sensor Networks (SDWSNs) are emerging members of the Wireless Sensor Network family with strict requirements on communication node sizes (1 cubic centimeter) and power consumption (< 2mW during short on-states). In addition, the large number of communication nodes needed in SDWSN require highly integrated solutions. This dissertation develops new design techniques for low-volume antennas and low-power receivers for SDWSN applications. In addition, it devises an antenna and low noise amplifier co-design methodology to increase the level of design integration, reduce receiver noise, and reduce the development cycle. This dissertation first establishes stringent principles for designing SDWSN electrically small antennas (ESAs). Based on these principles, a new ESA, the F-Inverted Compact Antenna (FICA), is designed at 916MHz. This FICA has a significant advantage in that it uses a small-size ground plane. The volume of this FICA (including the ground plane) is only 7% of other state-of-the-art ESAs, while its efficiency (48.53%) and gain (-1.38dBi) are comparable to antennas of much larger dimensions. A physics-based circuit model is developed for this FICA to assist system level design at the earliest stage, including optimization of the antenna performance. An antenna and low noise amplifier (LNA) co-design method is proposed and proven to be valid to design low power LNAs with the very low noise figure of only 1.5dB. To reduce receiver power consumption, this dissertation proposes a novel LNA active device and an input/ouput passive matching network optimization method. With this method, a power efficient high voltage gain cascode LNA was designed in a 0.13um CMOS process with only low quality factor inductors. This LNA has a 3.6dB noise figure, voltage gain of 24dB, input third intercept point (IIP3) of 3dBm, and power consumption of 1.5mW at 1.0V supply voltage. Its figure of merit, using the typical definition, is twice that of the best in the literature. A full low power receiver is developed with a sensitivity of -58dBm, chip area of 1.1mm2, and power consumption of 2.85mW

Active inductor techniques for BW extension

Today nano-meter technologies benefit from higher integration allowing for increased complexity, but also higher speeds. Demand for higher speeds at lower area and cost system pushes toward more self-contained circuits without the use of integrated passive components due to the large area required. This work aims to take advantage of CMOS technology and its reduced cost to research and design active inductors and its integration in circuits. There are many circuits such as LNA, CTLE, CML buffers, voltage mode driver that may require passive inductors to enhance its performance in today's era demand for speed. A study of the different topologies/techniques will be performed with the respective evaluation of their pros and cons. Based on these, a circuit architecture will be proposed and developed integrated within a block circuit with proper validation of the circuit performance parameters like power, ageing, precision, reliability and other relevant parameters

Resonant Circuit Topology for Radio Frequency Energy Harvesting

In this work the operation of a MOSFET based rectifier, composed of multiple stages of voltage doubler circuits used for radio frequency (RF) energy harvesting, is investigated. Analytical modeling of the input stage of the rectifier consisting of short-channel diode-connected transistors is carried out, and the equivalent input resistance obtained is used along with simulation results to improve impedance matching in the harvester. The criteria for voltage boosting and impedance matching, that are essential in the operation of energy harvester under low ambient RF levels, as well as the design considerations for a pi-match network to achieve matching to 50 Ohms, are elaborated on. In addition their application is demonstrated through simulations carried out using Advanced Design System (ADS) simulator. Furthermore, measurement results of an already fabricated dual-band RF harvester are presented, and the approach taken to improve the antenna design from the harvester chip measured input impedance is discussed. The integrated antenna-harvester system tested was capable of harvesting ambient RF power and generating DC output voltage levels above 1 V