To develop an efficient variable speed compressor motor system

This research presents a proposed new method of improving the energy efficiency of a Variable Speed Drive (VSD) for induction motors. The principles of VSD are reviewed with emphasis on the efficiency and power losses associated with the operation of the variable speed compressor motor drive, particularly at low speed operation.The efficiency of induction motor when operated at rated speed and load torque is high. However at low load operation, application of the induction motor at rated flux will cause the iron losses to increase excessively, hence its efficiency will reduce dramatically. To improve this efficiency, it is essential to obtain the flux level that minimizes the total motor losses. This technique is known as an efficiency or energy optimization control method. In practice, typical of the compressor load does not require high dynamic response, therefore improvement of the efficiency optimization control that is proposed in this research is based on scalar control model.In this research, development of a new neural network controller for efficiency optimization control is proposed. The controller is designed to generate both voltage and frequency reference signals imultaneously. To achieve a robust controller from variation of motor parameters, a real-time or on-line learning algorithm based on a second order optimization Levenberg-Marquardt is employed. The simulation of the proposed controller for variable speed compressor is presented. The results obtained clearly show that the efficiency at low speed is significant increased. Besides that the speed of the motor can be maintained. Furthermore, the controller is also robust to the motor parameters variation. The simulation results are also verified by experiment

Design of an Adaptive Neurofuzzy Inference Control System for the Unified Power-Flow Controller

This paper presents a new approach to control the operation of the unified power-flow controller (UPFC) based on the adaptive neurofuzzy inference controller (ANFIC) concept. The training data for the controller are extracted from an analytical model of the transmission system incorporating a UPFC. The operating points' space is dynamically partitioned into two regions: 1) an inner region where the desired operating point can be achieved without violating any of the UPFC constraints and 2) an outer region where it is necessary to operate the UPFC beyond its limits. The controller is designed to achieve the most appropriate operating point based on the real power priority. In this study, the authors investigated and analyzed the effect of the system short-circuit level on the UPFC operating feasible region which defines the limitation of its parameters. In order to illustrate the effectiveness of the control algorithm, simulation and experimental studies have been conducted using the MATLAB/SIMULINK and dSPACE DS1103 data-acquisition board. The obtained results show a clear agreement between simulation and experimental results which verify the effective performance of the ANFIC controller

Analysis and mitigation of dead time harmonics in the single-phase full-bridge PWM converters with repetitive controllers

In order to prevent the power switching devices (e.g., the Insulated-Gate-Bipolar-Transistor, IGBT) from shoot through in voltage source converters during a switching period, the dead time is added either in the hardware driver circuits of the IGBTs or implemented in software in Pulse-Width Modulation (PWM) schemes. Both solutions will contribute to a degradation of the injected current quality. As a consequence, the harmonics induced by the dead time (referred to as "dead time harmonics" hereafter) have to be compensated in order to achieve a satisfactory current quality as required by standards. In this paper, the emission mechanism of dead time harmonics in single-phase PWM inverters is thus presented considering the modulation schemes in details. More importantly, a repetitive controller has been adopted to eliminate the dead time effect in single-phase grid-connected PWM converters. The repetitive controller has been plugged into a proportional resonant-based fundamental current controller so as to mitigate the dead time harmonics and also maintain the control of the fundamental frequency grid current in terms of dynamics. Simulations and experiments are provided, which confirm that the repetitive controller can effectively compensate the dead time harmonics and other low-order distortions, and also it is a simple method without hardware modifications

Neural-Network Vector Controller for Permanent-Magnet Synchronous Motor Drives: Simulated and Hardware-Validated Results

This paper focuses on current control in a permanentmagnet synchronous motor (PMSM). The paper has two main objectives: The first objective is to develop a neural-network (NN) vector controller to overcome the decoupling inaccuracy problem associated with conventional PI-based vector-control methods. The NN is developed using the full dynamic equation of a PMSM, and trained to implement optimal control based on approximate dynamic programming. The second objective is to evaluate the robust and adaptive performance of the NN controller against that of the conventional standard vector controller under motor parameter variation and dynamic control conditions by (a) simulating the behavior of a PMSM typically used in realistic electric vehicle applications and (b) building an experimental system for hardware validation as well as combined hardware and simulation evaluation. The results demonstrate that the NN controller outperforms conventional vector controllers in both simulation and hardware implementation

A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI

This work demonstrates a RISC-V vector microprocessor implemented in 28 nm FDSOI with fully integrated simultaneous-switching switched-capacitor DC-DC (SC DC-DC) converters and adaptive clocking that generates four on-chip voltages between 0.45 and 1 V using only 1.0 V core and 1.8 V IO voltage inputs. The converters achieve high efficiency at the system level by switching simultaneously to avoid charge-sharing losses and by using an adaptive clock to maximize performance for the resulting voltage ripple. Details about the implementation of the DC-DC switches, DC-DC controller, and adaptive clock are provided, and the sources of conversion loss are analyzed based on measured results. This system pushes the capabilities of dynamic voltage scaling by enabling fast transitions (20 ns), simple packaging (no off-chip passives), low area overhead (16%), high conversion efficiency (80%-86%), and high energy efficiency (26.2 DP GFLOPS/W) for mobile devices

Power Quality Enhancement in Hybrid Photovoltaic-Battery System based on three–Level Inverter associated with DC bus Voltage Control

This modest paper presents a study on the energy quality produced by a hybrid system consisting of a Photovoltaic (PV) power source connected to a battery. A three-level inverter was used in the system studied for the purpose of improving the quality of energy injected into the grid and decreasing the Total Harmonic Distortion (THD). A Maximum Power Point Tracking (MPPT) algorithm based on a Fuzzy Logic Controller (FLC) is used for the purpose of ensuring optimal production of photovoltaic energy. In addition, another FLC controller is used to ensure DC bus stabilization. The considered system was implemented in the Matlab /SimPowerSystems environment. The results show the effectiveness of the proposed inverter at three levels in improving the quality of energy injected from the system into the grid.Peer reviewedFinal Published versio