862 research outputs found

    Application of advanced on-board processing concepts to future satellite communications systems

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    An initial definition of on-board processing requirements for an advanced satellite communications system to service domestic markets in the 1990's is presented. An exemplar system architecture with both RF on-board switching and demodulation/remodulation baseband processing was used to identify important issues related to system implementation, cost, and technology development

    Proceedings of the Second International Mobile Satellite Conference (IMSC 1990)

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    Presented here are the proceedings of the Second International Mobile Satellite Conference (IMSC), held June 17-20, 1990 in Ottawa, Canada. Topics covered include future mobile satellite communications concepts, aeronautical applications, modulation and coding, propagation and experimental systems, mobile terminal equipment, network architecture and control, regulatory and policy considerations, vehicle antennas, and speech compression

    Multimedia in mobile networks: Streaming techniques, optimization and User Experience

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    1.UMTS overview and User Experience 2.Streaming Service & Streaming Platform 3.Quality of Service 4.Mpeg-4 5.Test Methodology & testing architecture 6.Conclusion

    Development of a Model Plan to Implement Wide Area Educational Telecommunication Networks for Voice, Video, and Data Communication

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    Curriculum and Instructio

    Multipoint connection management in ATM networks

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    34th Midwest Symposium on Circuits and Systems-Final Program

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    Organized by the Naval Postgraduate School Monterey California. Cosponsored by the IEEE Circuits and Systems Society. Symposium Organizing Committee: General Chairman-Sherif Michael, Technical Program-Roberto Cristi, Publications-Michael Soderstrand, Special Sessions- Charles W. Therrien, Publicity: Jeffrey Burl, Finance: Ralph Hippenstiel, and Local Arrangements: Barbara Cristi

    A Scalable and Adaptive Network on Chip for Many-Core Architectures

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    In this work, a scalable network on chip (NoC) for future many-core architectures is proposed and investigated. It supports different QoS mechanisms to ensure predictable communication. Self-optimization is introduced to adapt the energy footprint and the performance of the network to the communication requirements. A fault tolerance concept allows to deal with permanent errors. Moreover, a template-based automated evaluation and design methodology and a synthesis flow for NoCs is introduced
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