Analyse et caractérisation des couplages substrat et de la connectique dans les circuits 3D : Vers des modèles compacts

The 3D integration is the most promising technological solution to track the level of integration dictated by Moore's Law (see more than Moore, Moore versus more). It leads to important research for a dozen years. It can superimpose different circuits and components in one box. Its main advantage is to allow a combination of heterogeneous and highly specialized technologies for the establishment of a complete system, while maintaining a high level of performance with very short connections between the different circuits. The objective of this work is to provide consistent modeling via crossing, and / or contacts in the substrate, with various degrees of finesse / precision to allow the high-level designer to manage and especially to optimize the partitioning between the different strata. This modelization involves the development of multiple views at different levels of abstraction: the physical model to "high level" model. This would allow to address various issues faced in the design process: - The physical model using an electromagnetic simulation based on 2D or 3D ( finite element solver ) is used to optimize the via (materials, dimensions etc..) It determines the electrical performance of the via, including high frequency. Electromagnetic simulations also quantify the coupling between adjacent via. - The analytical compact of via their coupling model, based on a description of transmission line or Green cores is used for the simulations at the block level and Spice type simulations. Analytical models are often validated against measurements and / or physical models.L’intégration 3D est la solution technologique la plus prometteuse pour suivre le niveau d’intégration dictée par la loi de Moore (cf. more than Moore, versus more Moore). Elle entraine des travaux de recherche importants depuis une douzaine d’années. Elle permet de superposer différents circuits et composants dans un seul boitier. Son principal avantage est de permettre une association de technologies hétérogènes et très spécialisées pour la constitution d’un système complet, tout en préservant un très haut niveau de performance grâce à des connexions très courtes entre ces différents circuits. L’objectif de ce travail est de fournir des modélisations cohérentes de via traversant, ou/et de contacts dans le substrat, avec plusieurs degrés de finesse/précision, pour permettre au concepteur de haut niveau de gérer et surtout d’optimiser le partitionnement entre les différentes strates. Cette modélisation passe par le développement de plusieurs vues à différents niveaux d’abstraction: du modèle physique au modèle « haut niveau ». Elle devait permettre de répondre à différentes questions rencontrées dans le processus de conception :- le modèle physique de via basé sur une simulation électromagnétique 2D ou 3D (solveur « éléments finis ») est utilisé pour optimiser l’architecture du via (matériaux, dimensions etc.) Il permet de déterminer les performances électriques des via, notamment en haute fréquence. Les simulations électromagnétiques permettent également de quantifier le couplage entre via adjacents. - le modèle compact analytique de via et de leur couplage, basé sur une description de type ligne de transmission ou noyaux de Green, est utilisé pour les simulations au niveau bloc, ainsi que des simulations de type Spice. Les modèles analytiques sont souvent validés par rapport à des mesures et/ou des modèles physiques

Design and Simulation of Vertical Grating Coupler for Photonic Integrated System-in-Package

Projecte final de carrera fet en col.laboració amb Technische Universität BerlinAs we approach the limits in operating speed of IC’s predicted by Moore’s Law, some alternative way of increasing velocities while reducing dimensions has to be found. In this context, optical interconnects appear to be an optimal solution that avoids the main limitations that electrical interconnects have. To implement these optical interconnects in the already well developed CMOS integrated environment, the System-in-Package (SiP) and the Silicon on Insulator (SOI) technologies arise as a good solution to achieve these goals. In this Thesis optical single mode strip nano waveguides and a grating coupler for vertical coupling to optical fibres are presented, designed and simulated. Their design parameters are optimized, and their performance analyzed and discussed. Firstly, the characteristics of large single mode rib waveguides and their direct butt coupling to fibres is studied. Their performance is found to be not good enough when the dimensions were reduced to under 1 μm, with losses as high as 14.5 dB. Therefore, nano strip waveguides are studied and simulated. They provide high light confinement and good propagation characteristics. Some performance characteristics (confinement factor, single mode region, effective index) are studied, for core widths in the range 100 – 600 nm. The vertical coupling of these nano strip waveguides to optical fibres by means of a grating coupler is simulated with the FDTD technique. The main design parameters of this grating coupler are optimized, obtaining losses of 7 dB for TE polarisation and 8.5 dB for TM. The misalignment tolerances are also analysed. The crosstalk effects between this grating and an hypothetical underlying waveguide are studied, showing that no light couples to the lower waveguide

Large space structures and systems in the space station era: A bibliography with indexes (supplement 04)

Bibliographies and abstracts are listed for 1211 reports, articles, and other documents introduced into the NASA scientific and technical information system between 1 Jul. and 30 Dec. 1991. Its purpose is to provide helpful information to the researcher, manager, and designer in technology development and mission design according to system, interactive analysis and design, structural concepts and control systems, electronics, advanced materials, assembly concepts, propulsion, and solar power satellite systems

The 1992 4th NASA SERC Symposium on VLSI Design

Papers from the fourth annual NASA Symposium on VLSI Design, co-sponsored by the IEEE, are presented. Each year this symposium is organized by the NASA Space Engineering Research Center (SERC) at the University of Idaho and is held in conjunction with a quarterly meeting of the NASA Data System Technology Working Group (DSTWG). One task of the DSTWG is to develop new electronic technologies that will meet next generation electronic data system needs. The symposium provides insights into developments in VLSI and digital systems which can be used to increase data systems performance. The NASA SERC is proud to offer, at its fourth symposium on VLSI design, presentations by an outstanding set of individuals from national laboratories, the electronics industry, and universities. These speakers share insights into next generation advances that will serve as a basis for future VLSI design

Proceedings of the Lunar Materials Technology Symposium

The meeting was organized around a possible lunar outpost scenario, featuring industrial technologies, systems, and components applicable to the extraction, processing, and fabrication of local materials. Acknowledged space resources experts as well as investigators from outside the field whose knowledge could be applied to space development activities were brought together. Presentations came from a variety of specialists in fields such as minerals processing, environmental control, and communications. The sessions of the symposium were divided into the following areas: resource characterization, energy management, materials processing, environment control, and automation and communications