Latest Developments in Industrial Hybrid Machine Tools that Combine Additive and Subtractive Operations

Hybrid machine tools combining additive and subtractive processes have arisen as a solution to increasing manufacture requirements, boosting the potentials of both technologies, while compensating and minimizing their limitations. Nevertheless, the idea of hybrid machines is relatively new and there is a notable lack of knowledge about the implications arisen from their in-practice use. Therefore, the main goal of the present paper is to fill the existing gap, giving an insight into the current advancements and pending tasks of hybrid machines both from an academic and industrial perspective. To that end, the technical-economical potentials and challenges emerging from their use are identified and critically discussed. In addition, the current situation and future perspectives of hybrid machines from the point of view of process planning, monitoring, and inspection are analyzed. On the one hand, it is found that hybrid machines enable a more efficient use of the resources available, as well as the production of previously unattainable complex parts. On the other hand, it is concluded that there are still some technological challenges derived from the interaction of additive and subtractive processes to be overcome (e.g., process planning, decision planning, use of cutting fluids, and need for a post-processing) before a full implantation of hybrid machines is fulfilledSpecial thanks are addressed to the Industry and Competitiveness Spanish Ministry for the support on the DPI2016-79889-R INTEGRADDI project and to the PARADDISE project H2020-IND-CE-2016-17/H2020-FOF-2016 of the European Union's Horizon 2020 research and innovation program

Protecting GPU's Microarchitectural Vulnerabilities via Effective Selective Hardening

Graphics Processing Units (GPUs) are today adopted in several domains for which reliability is fundamental, such as self-driving cars and autonomous machines. Unfortunately, on one side GPUs have been shown to have a high error rate and, on the other side, the constraints imposed by real-time safety-critical applications make traditional, costly, replication-based hardening solutions inadequate. This paper proposes an effective microarchitectural selective hardening of GPU modules to mitigate those faults that affect instructions correct execution. We first characterize, through Register-Transfer Level (RTL) fault injections, the architectural vulnerabilities of a GPU model (FlexGripPlus). We specifically target transient faults in the functional units and pipeline registers of a GPU core. Then, we apply selective hardening by triplicating the locations in each module that we found to be more critical. The results show that selective hardening using Triple Modular Redundancy (TMR) can correct 85% to 99% of faults in the pipeline registers and from 50% to 100% of faults in the functional units. The proposed selective TMR strategy reduces the hardware overhead by up to 65% when compared with traditional TMR

Selective SWIFT-R. A Flexible Software-Based Technique for Soft Error Mitigation in Low-Cost Embedded Systems

Commercial off-the-shelf microprocessors are the core of low-cost embedded systems due to their programmability and cost-effectiveness. Recent advances in electronic technologies have allowed remarkable improvements in their performance. However, they have also made microprocessors more susceptible to transient faults induced by radiation. These non-destructive events (soft errors), may cause a microprocessor to produce a wrong computation result or lose control of a system with catastrophic consequences. Therefore, soft error mitigation has become a compulsory requirement for an increasing number of applications, which operate from the space to the ground level. In this context, this paper uses the concept of selective hardening, which is aimed to design reduced-overhead and flexible mitigation techniques. Following this concept, a novel flexible version of the software-based fault recovery technique known as SWIFT-R is proposed. Our approach makes possible to select different registers subsets from the microprocessor register file to be protected on software. Thus, design space is enriched with a wide spectrum of new partially protected versions, which offer more flexibility to designers. This permits to find the best trade-offs between performance, code size, and fault coverage. Three case studies have been developed to show the applicability and flexibility of the proposal.This work was funded by the Ministry of Science and Innovation in Spain with the project ‘RENASER+: Integral Analysis of Digital Circuits and Systems for Aerospace Applications’ (TEC2010-22095-C03-01)

Fatigue response of as built DMLS processed Maraging Steel and effects of machining and heat and surface treatments

The main motivations for this study arise from the need for an assessment of the fatigue performance of DMLS produced Maraging Steel MS1, when it is used in the \u201cas fabricated\u201d state. The literature indicates a lack of knowledge from this point of view, moreover the great potentials of the additive process may be more and more incremented, if an easier and cheaper procedure could be used after the building stage. The topic has been tackled experimentally, investigating the impact of heat treatment, machining and micro-shot-peening on the fatigue strength with respect to the \u201cas built state\u201d. The results indicate that heat treatment significantly enhances the fatigue response, probably due to the relaxation of the post-process tensile residual stresses. Machining can also be effective, but it must be followed (not preceded) by micro-shot-peening, to benefit from the compressive residual stress state generated by the latter

Thermophysical Phenomena in Metal Additive Manufacturing by Selective Laser Melting: Fundamentals, Modeling, Simulation and Experimentation

Among the many additive manufacturing (AM) processes for metallic materials, selective laser melting (SLM) is arguably the most versatile in terms of its potential to realize complex geometries along with tailored microstructure. However, the complexity of the SLM process, and the need for predictive relation of powder and process parameters to the part properties, demands further development of computational and experimental methods. This review addresses the fundamental physical phenomena of SLM, with a special emphasis on the associated thermal behavior. Simulation and experimental methods are discussed according to three primary categories. First, macroscopic approaches aim to answer questions at the component level and consider for example the determination of residual stresses or dimensional distortion effects prevalent in SLM. Second, mesoscopic approaches focus on the detection of defects such as excessive surface roughness, residual porosity or inclusions that occur at the mesoscopic length scale of individual powder particles. Third, microscopic approaches investigate the metallurgical microstructure evolution resulting from the high temperature gradients and extreme heating and cooling rates induced by the SLM process. Consideration of physical phenomena on all of these three length scales is mandatory to establish the understanding needed to realize high part quality in many applications, and to fully exploit the potential of SLM and related metal AM processes

Selective Hardening of CNNs based on Layer Vulnerability Estimation

There is an increasing interest in employing Convolutional Neural Networks (CNNs) in safety-critical application fields. In such scenarios, it is vital to ensure that the application fulfills the reliability requirements expressed by customers and design standards. On the other hand, given the CNNs extremely high computational requirements, it is also paramount to achieve high performance. To meet both reliability and performance requirements, partial and selective replication of the layers of the CNN can be applied. In this paper, we identify the most critical layers of a CNN in terms of vulnerability to fault and selectively duplicate them to achieve a target reliability vs. execution time trade-off. To this end we perform a design space exploration to identify layers to be duplicated. Results on the application of the proposed approach to four case study CNNs are reported

Evaluation of a self-equilibrium cutting strategy for the contour method of residual stress measurement

An assessment of cutting-induced plasticity (CIP) is performed, by finite element (FE) prediction of the plastic strain accumulation along the cut tip when the EDM wire sections the NeT TG4 weld benchmark specimen along two cutting directions. The first direction corresponds to a conventional (C) cutting strategy, whereby the EDM wire cuts through the thickness of the weld specimen and travels in a direction transverse to the weld. The second direction corresponds to a self-equilibrating cutting (SE) strategy, whereby the EDM wire cuts across the transverse direction of the weld specimens and travels through the thickness of the plate. The cutting thus progresses simultaneously through the compression-tension-compression regions of present weld residual stress (WRS) field. This type of cutting strategy is believed to minimize the CIP by minimising residual stress redistribution during cutting, due to stress equilibration across the sectioned material. The simulated cutting procedures are conducted under a range of clamping conditions to assess whether mechanical restraint has a primary or secondary influence on CIP accumulation. Both predictions of CIP and the resultant back-calculated WRS demonstrate that (i) mechanical restraint is the primary variable influencing CIP development, and (ii) under no circumstance does a self-equilibrating cutting strategy perform significantly better than a conventional cutting approach. The reason that self-equilibrating cuts are not effective is illustrated by calculating the Mode I (KI) stress intensity factor (SIF) along the cut tip, and correlating trends in KI to CIP development

Analyzing the Sensitivity of GPU Pipeline Registers to Single Events Upsets

Graphics processing units are available solutions for high-performance safety-critical applications, such as self-driving cars. In this application domain, functional-safety and reliability are major concerns. Thus, the adoption of fault tolerance techniques is mandatory to detect or correct faults, since these devices must work properly, even when faults are present. GPUs are designed and implemented with cutting-edge technologies, which makes them sensitive to faults caused by radiation interference, such as single event upsets. These effects can lead the system to a failure, which is unacceptable in safety-critical applications. Therefore, effective detection and mitigation strategies must be adopted to harden the GPU operation. In this paper, we analyze transient effects in the pipeline registers of a GPU architecture. We run four applications at three GPU configurations, considering the source of the fault, its effect on the GPU, and the use of software-based hardening techniques. The evaluation was performed using a general-purpose soft-core GPU based on the NVIDIA G80 architecture. Results can guide designers in building more resilient GPU architectures