A distributed hard real-time Java system for high mobility components

In this work we propose a methodology for providing real-time capabilities to component-based, on-the-fly reconfigurable, distributed systems. In such systems, software components migrate across computational resources at run-time to allow applications to adapt to changes in user requirements or to external events. We describe how we achieve run-time reconfiguration in distributed Java applications by appropriately migrating servers. Guaranteed-rate schedulers at the servers provide the necessary temporal protection and so simplify remote method invocation management. We describe how we manage overhead and resource utilization by controlling the parameters of the server schedulers. According to our measurements, this methodology provides real-time capability to component-based reconfigurable distributed systems in an effcient and effective way. In addition, we propose a new resource discovery protocol, REALTOR, which is based on a combination of pull-based and push-based resource information dissemination. REALTOR has been designed for real-time component-based distributed applications in very dynamic or adverse environments. REALTOR supports survivability and information assurance by allowing the migration of components to safe locations under emergencies suchas externalattack, malfunction, or lackofresources. Simulation studies show that under normal and heavy load conditions REALTOR remains very effective in finding available resources, and does so with a reasonably low communication overhead.REALTOR 1)effectively locates resources under highly dynamic conditions, 2) has an overhead that is system-size independent, and 3) works well in highlyadverse environments.We evaluate the effectiveness of a REALTOR implementation as part of Agile Objects, an infrastructure for real-time capable, highly mobile Java components

Software Engineering of Component-Based Systems-of-Systems: A Reference Framework

CORE A.International audienceSystems-of-Systems (SoS) are complex infrastructures, which are characterized by a wide diversity of technologies and requirements imposed by the domain(s) they target. In this context, the software engineering community has been focusing on assisting the developers by providing them domain-specific languages, component-based software engineering frameworks and tools to leverage on the design and the development of such systems. However, the adoption of such approaches often prevents developers from combining several domains, which is a strong requirement in the context of SoS. Furthermore, only little attention has been paid to the definition of a modular toolset and an extensible runtime infrastructure for deploying and executing SoS. In this paper, we therefore propose a reference framework to leverage on the software engineering of SoS. Our reference framework has been validated on the development of two platforms, namely Hulotte and FraSCAti, to demonstrate that the resulting complexity is isolated in the core toolset, while the development of domain-specific extensions is leveraged and simplified by clearly identified abstractions

Design and implementation of a modular controller for robotic machines

This research focused on the design and implementation of an Intelligent Modular Controller (IMC) architecture designed to be reconfigurable over a robust network. The design incorporates novel communication, hardware, and software architectures. This was motivated by current industrial needs for distributed control systems due to growing demand for less complexity, more processing power, flexibility, and greater fault tolerance. To this end, three main contributions were made. Most distributed control architectures depend on multi-tier heterogeneous communication networks requiring linking devices and/or complex middleware. In this study, first, a communication architecture was proposed and implemented with a homogenous network employing the ubiquitous Ethernet for both real-time and non real-time communication. This was achieved by a producer-consumer coordination model for real-time data communication over a segmented network, and a client-server model for point-to-point transactions. The protocols deployed use a Time-Triggered (TT) approach to schedule real-time tasks on the network. Unlike other TT approaches, the scheduling mechanism does not need to be configured explicitly when controller nodes are added or removed. An implicit clock synchronization technique was also developed to complement the architecture. Second, a reconfigurable mechanism based on an auto-configuration protocol was developed. Modules on the network use this protocol to automatically detect themselves, establish communication, and negotiate for a desired configuration. Third, the research demonstrated hardware/software co-design as a contribution to the growing discipline of mechatronics. The IMC consists of a motion controller board designed and prototyped in-house, and a Java microcontroller. An IMC is mapped to each machine/robot axis, and an additional IMC can be configured to serve as a real-time coordinator. The entire architecture was implemented in Java, thus reinforcing uniformity, simplicity, modularity, and openness. Evaluation results showed the potential of the flexible controller to meet medium to high performance machining requirements

Diseño e implementación de estrategias self-x en una arquitectura de control cognitivo artificial (ISCOSI_87/1314)

Los procesos de microfabricación son complejos procesos físicos que están continuamente cambiando en un entorno dinámico. En este contexto, el principal objetivo es el desarrollo de tecnologías computacionales y algoritmos con el fin de permitir un comportamiento de los procesos de microfabricación más rápido, auto organizado y auto optimizado por medio de sistemas de control inteligente. En este trabajo diseñamos e implementamos una arquitectura cognitiva artificial para controlar los procesos de fabricación. Además, los aspectos del hardware se han tenido en cuenta con el fin de desplegar la arquitectura desarrollada en una plataforma hardware de bajo coste para reducir los gastos de los equipos. Este trabajo está basado en una metodología con seis pasos principales. Primero, hemos diseñado una arquitectura cognitiva artificial inspirada en la aproximación Modi ed Shared Circuits Model, usando UML. Después de esto, la arquitectura ha sido desarrollada en Java. Una vez que la arquitectura ha sido implementada la hemos instanciado con el fin de probarla a través de estudios de simulación y experimentos reales en una instalación industrial. Otros objetivos de este trabajo son la instanciación con un algoritmo offline de optimización basado en el método de entropía cruzada y un algoritmo online de aprendizaje basado en Q-learning. De este modo hemos construido una instaciación con capacidades de auto optimización y auto aprendizaje. Es importante destacar el uso de sistemas de inferencia borrosa y sistemas de inferencia borrosa neuronal adaptados (ANFIS) escritos en C/C++, invocados desde Java gracias a la tecnología SWIG. Además, hemos dotado a la instanciación de la capacidad de ejecutarse en un entorno distribuido basado en el middleware ZeroC Ice. En consecuencia, la instanciación se ejecutar a en dos Raspberry Pi, con la unidad cognitiva y la ejecutiva desplegadas en cada una de ellas. También hemos usado el servicio IceGrid para dotar a la instanciación de la habilidad de descubrir los equipos sin tener que introducir manualmente las direcciones IP. Desde nuestra experiencia, la principal contribución de este trabajo es, además del diseño y la implementación de la arquitectura cognitiva artificial, la evaluación del rendimiento usando estudios de simulación y pruebas en tiempo real en una instalación industrial de microfabricaci ón. El objetivo de estos experimentos es comprobar la idoneidad de las funciones implementadas en la arquitectura y demostrar su capacidad de control ejecutándose en una hardware de bajo coste. Con ando en los resultados experimentales hemos demostrado que el control cognitivo artificial produce buenos resultados y promete oportunidades para tratar con sistemas complejos incluso ejecutándose en máquinas de poca potencia. Pero más importante es que este trabajo nos ofrece una base y un marco de trabajo computacional que habilitar a nuevas funciones para mejorar la arquitectura cognitiva artificial que hemos desarrollado.Micromanufacturing processes are complex physical processes which are continuously changing in a dynamic environment. In this context the main objective is the development of computational technologies and algorithms in order to enable faster, self-organized, self-optimized behavior of micromanufacturing processes by means of intelligent control systems. In this work we design and implement an arti cial cognitive architecture for controlling manufacturing processes. Moreover, hardware aspects are also considered in order to deploy the developed architecture on low-cost platform hardware in order to reduce the cost of the hosts. This work is based on a methodology with six main steps. Firstly, we have designed an arti cial cognitive architecture, inspired in the Modi ed Shared Circuits Model approach, using UML. After that, the architecture is developed and implemented in Java. Once the architecture is developed, we have built an instantiation of the architecture in order to test it by simulation studies and actual experiments in an industrial setup. Other targets of this work are the instantiation with an o -line optimization algorithm based on cross-entropy method and an on-line learning algorithm based on Q-learning method. Thereby we have built an instantiation with self-optimization and self-learning capabilities. It is important to note that inference models are fuzzy inference systems and Adaptive Neural Fuzzy Inference Systems (ANFIS) models written in C/C++, invoked from Java by means of the SWIG technology. In addition, we have provide the instantiation with the feature of running in a distributed environment on the basis of ZeroC Ice middleware. Thus the instantiation will run in two Raspberry Pi, with the cognitive unit and the executive unit deployed in each low-cost computing platform. We have also used the IceGrid service to provide the instantiation with the ability of discovering host without having to enter manually their IP addresses. From the best of our knowledge, one of the main contributions of this work is not only the design and implementation of the arti cial cognitive control architecture but also to assess the performance using simulation studies and real time tests in an industrial setup of micromanufacturing plan. The goal of theses experiments is to check the suitability of the functions implemented in the architecture and to demonstrate its control capability running in a low-cost hardware. Relying on the experimental results we have demonstrated that the arti cial cognitive control yields good results and promising opportunities to deal with complex systems even running in a low power machine as the Raspberry Pi. But most important is that this work give us the basement and the computational framework to enable new functions in order to improve the developed arti cial cognitive architecture