1,158 research outputs found

    Security of Electrical, Optical and Wireless On-Chip Interconnects: A Survey

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    The advancement of manufacturing technologies has enabled the integration of more intellectual property (IP) cores on the same system-on-chip (SoC). Scalable and high throughput on-chip communication architecture has become a vital component in today's SoCs. Diverse technologies such as electrical, wireless, optical, and hybrid are available for on-chip communication with different architectures supporting them. Security of the on-chip communication is crucial because exploiting any vulnerability would be a goldmine for an attacker. In this survey, we provide a comprehensive review of threat models, attacks, and countermeasures over diverse on-chip communication technologies as well as sophisticated architectures.Comment: 41 pages, 24 figures, 4 table

    Contribution to the development of microwave remote sensing for UAV systems.

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    Microwave technology is very sensitive to Radio Frequency Interferences (RFI). Works previously done within this Master by Marc Jou [1] showed the impossibility to retrieve measurements using L-band radiometers on-board drones. After detecting such issue, Balamis first tried to solve it by hardware: a new antenna design and the extensive use of shielding on the drone were tried without success. Balamis started the development of its first digital radiometer based on the use of Software Defined Radio architecture on 2017, partially funded with the support of CDTI. The resulting minimum viable digital radiometer was ready by June 2019, but it did not include any RFI mitigation capability. Developments done my Master student Ahmad Daoud [2] demonstrated the identification of RFI using Fast Fourier Transform (FFT) over RAW data but could not provide any efficient implementation of its mitigation on-board the L-band radiometer. The proposed solution is the implementation of the FFT and the RFI filters using Field Programmable Gate of Array (FPGA) for the input signals, and its concurrent performance. Filtering an analog signal by introducing in-system FFT of ZYNQ7000 FPGA is implemented in this project. Additionally, the power consumption of FPGA, and the need to dissipate it, forces the development of a temperature control system with cooling capabilities. It is done to improve the previous heating-only thermal control of Balamis radiometer. Such more advanced thermal control will be also used for the Interferometric Ground-based Synthetic Aperture Radar that Balamis is developing. Solving these two goals are therefore the purpose of this Master Thesis

    Autonomous Sensing Nodes for IoT Applications

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    The present doctoral thesis fits into the energy harvesting framework, presenting the development of low-power nodes compliant with the energy autonomy requirement, and sharing common technologies and architectures, but based on different energy sources and sensing mechanisms. The adopted approach is aimed at evaluating multiple aspects of the system in its entirety (i.e., the energy harvesting mechanism, the choice of the harvester, the study of the sensing process, the selection of the electronic devices for processing, acquisition and measurement, the electronic design, the microcontroller unit (MCU) programming techniques), accounting for very challenging constraints as the low amounts of harvested power (i.e., [ÎĽW, mW] range), the careful management of the available energy, the coexistence of sensing and radio transmitting features with ultra-low power requirements. Commercial sensors are mainly used to meet the cost-effectiveness and the large-scale reproducibility requirements, however also customized sensors for a specific application (soil moisture measurement), together with appropriate characterization and reading circuits, are also presented. Two different strategies have been pursued which led to the development of two types of sensor nodes, which are referred to as 'sensor tags' and 'self-sufficient sensor nodes'. The first term refers to completely passive sensor nodes without an on-board battery as storage element and which operate only in the presence of the energy source, provisioning energy from it. In this thesis, an RFID (Radio Frequency Identification) sensor tag for soil moisture monitoring powered by the impinging electromagnetic field is presented. The second term identifies sensor nodes equipped with a battery rechargeable through energy scavenging and working as a secondary reserve in case of absence of the primary energy source. In this thesis, quasi-real-time multi-purpose monitoring LoRaWAN nodes harvesting energy from thermoelectricity, diffused solar light, indoor white light, and artificial colored light are presented

    Energy Efficient Network-on-Chip Architectures for Many-Core Near-Threshold Computing System

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    Near threshold computing has unraveled a promising design space for energy efficient computing. However, it is still plagued by sub-optimal system performance. Application characteristics and hardware non-idealities of conventional architectures (those optimized for nominal voltage) prevent us from fully leveraging the potential of NTC systems. Increasing the computational core count still forms the bedrock of a multitude of contemporary works that address the problem of performance degradation in NTC systems. However, these works do not categorically address the shortcomings of the conventional on-chip interconnect fabric in a many core environment. In this work, we quantitatively demonstrate the performance bottleneck created by a conventional NTC architecture in many-core NTC systems. To reclaim the performance lost due to a sub-optimal NoC in many-core NTC systems, we propose BoostNoC—a power efficient, multi-layered network-on-chip architecture. BoostNoC improves the system performance by nearly 2× over a conventional NTC system, while largely sustaining its energy benefits. Further, capitalizing on the application characteristics, we propose two BoostNoC derivative designs: (i) PG BoostNoC; and (ii) Drowsy BoostNoC; to improve the energy efficiency by 1.4× and 1.37×, respectively over conventional NTC system

    A FPGA-based architecture for real-time cluster finding in the LHCb silicon pixel detector

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    The data acquisition system of the LHCb experiment has been substantially upgraded for the LHC Run 3, with the unprecedented capability of reading out and fully reconstructing all proton–proton collisions in real time, occurring with an average rate of 30 MHz, for a total data flow of approximately 32 Tb/s. The high demand of computing power required by this task has motivated a transition to a hybrid heterogeneous computing architecture, where a farm of graphics cores, GPUs, is used in addition to general–purpose processors, CPUs, to speed up the execution of reconstruction algorithms. In a continuing effort to improve real–time processing capabilities of this new DAQ system, also with a view to further luminosity increases in the future, low–level, highly–parallelizable tasks are increasingly being addressed at the earliest stages of the data acquisition chain, using special–purpose computing accelerators. A promising solution is offered by custom–programmable FPGA devices, that are well suited to perform high–volume computations with high throughput and degree of parallelism, limited power consumption and latency. In this context, a two–dimensional FPGA–friendly cluster–finder algorithm has been developed to reconstruct hit positions in the new vertex pixel detector (VELO) of the LHCb Upgrade experiment. The associated firmware architecture, implemented in VHDL language, has been integrated within the VELO readout, without the need for extra cards, as a further enhancement of the DAQ system. This pre–processing allows the first level of the software trigger to accept a 11% higher rate of events, as the ready– made hit coordinates accelerate the track reconstruction, while leading to a drop in electrical power consumption, as the FPGA implementation requires O(50x) less power than the GPU one. The tracking performance of this novel system, being indistinguishable from a full–fledged software implementation, allows the raw pixel data to be dropped immediately at the readout level, yielding the additional benefit of a 14% reduction in data flow. The clustering architecture has been commissioned during the start of LHCb Run 3 and it currently runs in real time during physics data taking, reconstructing VELO hit coordinates on–the–fly at the LHC collision rate

    QoSS Hierarchical NoC-Based Architecture for MPSoC Dynamic Protection

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    As electronic systems are pervading our lives, MPSoC (multiprocessor system-on-chip) security is becoming an important requirement. MPSoCs are able to support multiple applications on the same chip. The challenge is to provide MPSoC security that makes possible a trustworthy system that meets the performance and security requirements of all the applications. The network-on-chip (NoC) can be used to efficiently incorporate security. Our work proposes the implementation of QoSS (quality of security service) to overcome present MPSoC vulnerabilities. QoSS is a novel concept for data protection that introduces security as a dimension of QoS. QoSS takes advantage of the NoC wide system visibility and critical role in enabling system operation, exploiting the NoC components to detect and prevent a wide range of attacks. In this paper, we present the implementation of a layered dynamic security NoC architecture that integrates agile and dynamic security firewalls in order to detect attacks based on different security rules. We evaluate the effectiveness of our approach over several MPSoCs scenarios and estimate their impact on the overall performance. We show that our architecture can perform a fast detection of a wide range of attacks and a fast configuration of different security policies for several MPSoC applications

    Modular Instrumentation for Controlling and Monitoring In-Vitro Cultivation Environment and Image-based Functionality Measurements of Human Stem Cells

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    Artificial animal cell culture was successfully developed by Ross Harrison in 1907. But it was not until the 1940’s and 1950’s that several developments occurred, which expedited the cell culturing in-vitro (C-Vitro) to be a consistent and reproducible technique to study isolated living-cells in a controlled environment. Currently, CVitro is one of the major tools in cellular and molecular biology both in the academia and industry. They are extensively utilised to study the cellular physiology/biochemistry, to screen drugs/therapeutic compounds, to understand the effects of drugs/toxic compounds and also to identify the pathways of carcinogenesis/mutagenesis. It is also used in large scale manufacturing of vaccines and therapeutic proteins. In any experimental setup, it is important that the C-Vitro model should represent the physiological phenomena of interest with reasonable accuracy so that all experimental results are statistically consistent and reproducible. In this direction, sensors and measurement systems play important roles in in-situ detection and/or control/manipulation of cells/tissues/environment. This thesis aimed to develop new technology for tailored cell culturing and integrated measurements. Firstly, design and assembly of a portable Invert-upright microscope interchangeable modular cell culturing platform (iuCMP) was envisioned. In contrast to conventional methods, micro-scaled systems mimic the cells' natural microenvironment more precisely, facilitating accurate and tractable models. The iuCMP integrates modular measurement schemes with a mini culture chamber using biocompatible cell-friendly materials, automated environment-control (temperature and gas concentrations), oxygen sensing and simultaneous functional measurements (electrophysiological and image-based). Time lapse microscopy is very useful in cell biology, but integration of advanced >i>in-vitro/device based biological systems (e.g. lab/organ/body-on-chips, or mini-bioreactors/microfluidic systems) into conventional microscopes can be challenging in several circumstances due to multiple reasons. But in iuCMP the main advantage is, the microscope can be switched either as an inverted or as an upright system and therefore can accommodate virtually any in-vitro device. It can capture images from regions that are otherwise inaccessible by conventional microscopes, for example, cells cultured on physical or biochemical sensor systems. The modular design also allows accommodating more sensor or measurement systems quite freely. We have demonstrated the system for video-based beating analysis of cardiomyocytes, cell orientation analysis on nanocellulose, and simultaneous long-term in-situ microscopy with oxygen and temperature sensing in hypoxia. In an example application, the system was utilised for long-term temperature stressing and simultaneous mechanobiological analysis of human induced pluripotent stem cell-derived cardiomyocytes (hiPSC-CMs). For this the iuCMP together with a temperature sensor plate (TSP) and a novel non-invasive beating analysis software (CMaN—cardiomyocyte function analysis tool, scripted as a subpart of this thesis), was applied for automated temperature response studies in hiPSC-CM cultures. In-situ temperature sensing is usually challenging with bulky external sensors, but TSPs solved this issue. In the temperature response study, we showed that the relationship between hiPSC-CM beating frequency and temperature is non-linear and measured the Q10 temperature coefficients. Moreover, we observed the hiPSC-CM contractile networking, including propagation of the action potential signal between dissociated clusters and their non-invasive measurements. It was the first case where these events were reported in hiPSC-CM clusters and their noninvasive measurements by image processing. The software CMaN comes with a user-friendly interface and, is equipped with features for batch processing, movement centre detection and cluster finding. It can extract six different signals of the contractile motion of cardiomyocytes (clusters or single cells) per processing. This ensures a minimum of one useful beating signal even in the cases of complex beating videos. On the processing end, compared to similar tools, CMaN is faster, more sensitive, and computationally less expensive and allows ROI based processing. In the case of healthy cells, the waveform of the signal from the CMaN resembles an ECG signal with positive and negative segments, allowing the computation of contraction and relaxation features separately. In addition to iuCMP, a Modular optical pH measurement system (MO-pH) for 24/7 non-contact cell culture measurements was also developed. The MO-pH incorporates modular sterilisable optical parts and is used in phenol-red medium cell cultures. The modular assembly of MO-pH cassettes is unique and reusable. Measurements are carried out in a closed flow system without wasting any culture medium and requires no special manual attention or recalibrations during culture. Furthermore, a new absorption correction model was put forward that minimised errors caused e.g. by biolayers in spectrometric pH measurement, which improved the pH measurement accuracy. MO-pH has been applied in long-term human adipose stem cells (hASC) expansion cultures in CO2 dependent and independent media. Additionally, the MO-pH was also utilised to comprehend the behaviour of pH, temperature and humidity in water jacked incubators as well as to record the pH response as a function of temperature in the presence and absence of CO2 in the context of stem cell cultures. The resulting plots clearly showed the interplay between measured parameters indicating a few stress sources present all through the culture. Additionally, it provided an overall picture of behaviour of critical control parameters in an incubator and pointed out the need for bioprocess systems with automatic process monitoring and smart control for maximum yield, optimal growth and maintenance of the cells. Besides, we also integrated MO-pH into flasks with reclosable lids (RL-F) and tested its applicability in stem cell cultures. A standalone system around an RL-F flask was built by combining the cell culture, medium perfusion and optical measurements. The developed RL-F system has been successfully tested in ASC-differentiation cultures. Finally, a few trial experiments for image-based pH estimation aimed for iuCMP have also been carried out. This includes tests with LCD illumination, optical projection tomography, and webcam systems. In reality, the pH is not distributed uniformly in tissues, and has shown a gradient of up to 1.0 pH unit within 1 cm distance. Therefore, producing reliable pH maps also in in-vitro can be important in understanding various common pathologies and location of lesions. A reliable and adequately developed long-term pH mapping method will be an important addition into the iuCMP

    Systematische Transaction-Level-Kommunikations-Modellierung mit SystemC

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    An emerging approach to embedded system design is to assemble them from a library of hardware and software component models (IP, intellectual property) using a system description language, such as SystemC. SystemC allows describing the communication among IPs in terms of abstract operations (transactions). The promise is that with transaction-level modeling (TLM), future systems-on-chip with one billion transistors and more can be composed out of IPs as simply as playing with LEGO bricks. However, reality is far out. In fact, each IP vendor promotes another proprietary interface standard and the provided design tools lack compatibility, such that heterogeneous IPs cannot be integrated efficiently. A novel generic interconnect fabric for TLM is presented which aims at enabling inter-operation between models of different levels of abstraction (mixed-mode) and models with different interfaces (heterogeneous components), with as little overhead as possible. A generic, protocol independent representation of transactions is developed, among with an abstraction level formalism. This approach is shown to support systematic simulation of state-of-the-art buses and networks-on-chip such as IBM CoreConnect and PCI Express over several levels of TLM abstraction. A layered simulation framework for SystemC, GreenBus, is developed to examine the proposed concepts. The thesis discusses new implementation techniques for communication modeling with SystemC which outperform the existing approaches in terms of flexibility, simulation accuracy, and performance. Based on these techniques, advanced concepts for TLM-based hardware/software co-design and FPGA prototyping are examined. Several experiments and a video processor case study highlight the efficiency of the approach and show its applicability in a TLM design flow.Eingebettete Systeme werden zunehmend auf Basis vorgefertigter Hard- und Softwarebausteine entwickelt, die in Form von Modellen (IP, Intellectual Property) vorliegen. Hierzu werden Systembeschreibungssprachen wie SystemC eingesetzt. SystemC ermöglicht, die Kommunikation zwischen IPs durch abstrakte Operationen, sog. Transaktionen zu beschreiben. Mit dieser Transaction-Level-Modellierung (TLM) sollen auch zukünftige Systeme mit 1 Milliarde Transistoren und mehr effizient entwickelt werden können. Idealerweise sollte das Hantieren mit IPs dabei so einfach sein wie das Spielen mit LEGO-Steinen. In der Realität sind jedoch IPs unterschiedlicher Hersteller nicht ohne weiteres integrierbar, und auch die Entwurfswerkzeuge sind nicht kompatibel. In dieser Doktorarbeit wird ein neuer, generischer Ansatz für die Transaction-Level-Modellierung mit SystemC vorgestellt, der Kommunikation zwischen Modellen auf unterschiedlichen Abstraktionsebenen (Mixed-Mode) und mit unterschiedlichen Schnittstellen (heterogene Komponenten) möglich macht. Der zusätzlich benötigte Simulations- und Code-Aufwand ist minimal. Ein protokollunabhängiges Transaktionsmodell und ein formaler Ansatz zur Beschreibung von Abstraktionsebenen werden vorgestellt, mit denen verschiedenartige Busse und Networks-on-Chip wie IBM CoreConnect und PCI Express auf verschiedenen TLM-Abstraktionsebenen simuliert werden können. Ein modulares Simulationsframework für SystemC wird entwickelt (GreenBus), um die vorgeschlagenen Konzepte zu untersuchen. Anhand von GreenBus werden neue Implementierungstechniken diskutiert, die den existierenden Ansätzen in Flexibilität, Simulationsgenauigkeit und -geschwindigkeit überlegen sind. Die Vor- und Nachteile der entwickelten Techniken werden mit Experimenten belegt, und eine Videoprozessor-Fallstudie demonstriert die Effizienz des Ansatzes in einem TLM-basierten Entwurfsfluss
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