On microelectronic self-learning cognitive chip systems

After a brief review of machine learning techniques and applications, this Ph.D. thesis examines several approaches for implementing machine learning architectures and algorithms into hardware within our laboratory. From this interdisciplinary background support, we have motivations for novel approaches that we intend to follow as an objective of innovative hardware implementations of dynamically self-reconfigurable logic for enhanced self-adaptive, self-(re)organizing and eventually self-assembling machine learning systems, while developing this new particular area of research. And after reviewing some relevant background of robotic control methods followed by most recent advanced cognitive controllers, this Ph.D. thesis suggests that amongst many well-known ways of designing operational technologies, the design methodologies of those leading-edge high-tech devices such as cognitive chips that may well lead to intelligent machines exhibiting conscious phenomena should crucially be restricted to extremely well defined constraints. Roboticists also need those as specifications to help decide upfront on otherwise infinitely free hardware/software design details. In addition and most importantly, we propose these specifications as methodological guidelines tightly related to ethics and the nowadays well-identified workings of the human body and of its psyche

ANISOTROPIC STRATEGY TO ACHIEVE THE DECREASE IN BLUR AND IMPROVE IN EDGE INFORMATION

The anisotropic weighting model is made to catch more details in horizontal than vertical directions. The filter-based compensation methodology features a Palladian and spatial sharpening filters that are designed to enhance the edge information and lower the blurring effect. Additionally, the hardware cost was effectively reduced by hardware discussing and reconfigurable design techniques. Within this paper, a minimal-complexity color interpolation formula is suggested for that VLSI implementation in tangible-time applications. The suggested novel formula includes an advantage detector, an anisotropic weighting model along with a filter-based compensator. The VLSI architecture from the suggested design achieves 200 MHz with 5.2 K gate counts, and it is core area synthesized with a CMOS process. In contrast to the prior low-complexity techniques, the work not just reduces gate counts or power consumption, but additionally increases the average CPSNR quality by greater than 1.6 dB. By analyzing the parameters of those three eco-friendly color interpolation models, it's clearly the sign of the compensation for eco-friendly color is really a spatial sharpening filter

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Introduction Modern communication systems are very complex heterogeneous systems realizing world-wide video and audio communication and using different networks and protocols with a specified quality of service. Such communication systems consist of servers and clients. Especially clients are very different user devices, from powerful personal computers to small cellular phones. A client can communicate with other clients and servers, using services like live video conferences or it can store and can demand video and audio records (see also One of the main challenges for configuration and structuring of such a heterogeneous system is to guarantee the specified quality of service with a minimum of costs. The designer may meet the challenge by using his practical knowledge or by building up prototypes or by utilising formal methods such as performance analysis and simulation. Object Oriented System Simulation of Large Heterogeneous Communication Systems Uwe Hatnik, Jürgen Haufe, Peter Schwarz Fraunhofer Institut für Integrierte Schaltungen, Germany email: [email protected] Abstract Communication systems consist of many soft-and hardware components with a wide range of parameters which affect mainly the provided quality of service. One of the main challenges for configuration and structuring such a heterogeneous system is to guarantee the specified quality of service with a minimum of costs. In this paper, we introduce a simulation based approach which helps the designer to determine the best fitting parameter values. Our approach combines prototyping and simulation in a common environment. Servers Network (WAN, LAN) Clients 186 In this contribution, we introduce a simulation based analysis approach which combines the fore-mentioned analysing methods. In our approach both simulation models and real hardware and real software prototypes can be executed in a common environment. Results of the application of formal methods may be integrated into the simulation models, e.g. distribution functions, profiling results as well as measured values. The approach was driven by our experience that only a mix of different analysis methods which complement one another may bridge the analysis gap of such huge heterogeneous systems. The text is organized as follows. Section 2 details the analysis requirements of the system we focus on. Section 3 gives an overview of our modelling approach. Implementation aspects are described in section 4. Requirements in communication system design analysis Clients and servers of a communication system consist of software and hardware components like real-time and non real-time operation systems Parameter determination: A lot of parameters influence the system behaviour. One goal of the system simulation is to find optimal parameter values for a special configuration. Some parameters are specified by the service demand, for example the video resolution, the number of colours, the net bandwidth, and the used network protocol. Other parameters depend on the computer used, like CPU performance, memory size and so on. Additionally there are software parameters like buffer size and the used algorithm for data processing. There is a large amount of parameters and the optimal configuration is very system specific. Therefore the parameters can not determined completely analytically. Performance analysis: Since optimal system parameters can hardly be determined only analytically, simulation is also important for examining system performance depending on the hard-and software parameters. Configuration analysis: The configuration of a server or client depends on the demanded service and the client system. For example a specific data compressing algorithm is used depending on system parameters of the client like CPU performance and memory size. There are a lot of possible hard-and software combinations. It would be useful to determine what combination is suitable for a special service and configuration. Relationships between the components: There is a more or less tight correlation between the components of a configuration. For that reason, the system has to be treated as a whole. For example, swapping out parts of the software to hardware would decrease the load of the CPU, bu

Monolithic Integration of CMOS Charge Pumps for High Voltage Generation beyond 100 V

Monolithic integration of step-up DC-DC converters used to be one of the largest challenges in high voltage CMOS SoCs. Charge pumps are considered as the most promising solution regarding in- tegration levels compared to boost converter with bulky inductors. However, conventional charge pump architectures usually show significant drawbacks and reliability problems, when used as on- chip high voltage generators. Hence, innovative charge pump architectures are required to realize the monolithic integration of charge pumps in high voltage applications. In this dissertation, three 4-phase charge pump architectures with the dynamic body biasing tech- nique and clock schemes with dead time techniques were proposed to overcome drawbacks such as body effect and reverse current problem of traditional Pelliconi charge pump. The influences of high voltage CMOS sandwich capacitors on the voltage gain and power efficiency of charge pumps were extensively investigated. The most reasonable 4-phase charge pump architecture with a suitable configuration of high voltage sandwich capacitors regarding the voltage gain and power efficiency was chosen to implement two high voltage ASICs in an advanced 120 V 0.35 μm high voltage CMOS technology. The first test chip operates successfully and is able to generate up to 120 V from a 3.7 V low voltage DC supply, which shows the highest output voltage among all the reported fully integrated CMOS charge pumps. The measurement results confirmed the benefits of the proposed charge pump architectures and clock schemes. The second chip providing a similar output voltage has a reduced chip size mainly due to decreased capacitor areas by increased clock frequencies. Fur- thermore, the second chip with an on-chip clock generator works independently of external clock signals which shows the feasibility of integrated charge pumps as part of high voltage SoCs. Based on the successful implementation of those high voltage CMOS ASICs, further discussions on the stability of the output voltage, levels of integration and limitations in the negative high voltage generation of high voltage CMOS charge pumps are held with the aid of simulation or measurement results. Feed- back regulation by adjusting the clock frequency or DC power supply is able to stabilize the voltage performance effectively while being easily integrated on-chip. Increasing the clock frequency can significantly reduce the required capacitor values which results in reduced chip sizes. An application example demonstrates the importance of fully integrated high voltage charge pumps. Besides, a new design methodology for the on-chip high voltage generation using CMOS technolo- gies was proposed. It contains a general design flow focusing mainly on the feasibility and reliability of high voltage CMOS ASICs and design techniques for on-chip high voltage generators. In this dissertation, it is proven that CMOS charge pumps using suitable architectures regarding the required chip size and circuit reliability are able to be used as on-chip high voltage generators for voltages beyond 100 V . Several methods to improve the circuit performance and to extend the functionalities of high voltage charge pumps are suggested for future works