135,988 research outputs found
An Improved Implementation and Abstract Interface for Hybrid
Hybrid is a formal theory implemented in Isabelle/HOL that provides an
interface for representing and reasoning about object languages using
higher-order abstract syntax (HOAS). This interface is built around an HOAS
variable-binding operator that is constructed definitionally from a de Bruijn
index representation. In this paper we make a variety of improvements to
Hybrid, culminating in an abstract interface that on one hand makes Hybrid a
more mathematically satisfactory theory, and on the other hand has important
practical benefits. We start with a modification of Hybrid's type of terms that
better hides its implementation in terms of de Bruijn indices, by excluding at
the type level terms with dangling indices. We present an improved set of
definitions, and a series of new lemmas that provide a complete
characterization of Hybrid's primitives in terms of properties stated at the
HOAS level. Benefits of this new package include a new proof of adequacy and
improvements to reasoning about object logics. Such proofs are carried out at
the higher level with no involvement of the lower level de Bruijn syntax.Comment: In Proceedings LFMTP 2011, arXiv:1110.668
The Parma Polyhedra Library: Toward a Complete Set of Numerical Abstractions for the Analysis and Verification of Hardware and Software Systems
Since its inception as a student project in 2001, initially just for the
handling (as the name implies) of convex polyhedra, the Parma Polyhedra Library
has been continuously improved and extended by joining scrupulous research on
the theoretical foundations of (possibly non-convex) numerical abstractions to
a total adherence to the best available practices in software development. Even
though it is still not fully mature and functionally complete, the Parma
Polyhedra Library already offers a combination of functionality, reliability,
usability and performance that is not matched by similar, freely available
libraries. In this paper, we present the main features of the current version
of the library, emphasizing those that distinguish it from other similar
libraries and those that are important for applications in the field of
analysis and verification of hardware and software systems.Comment: 38 pages, 2 figures, 3 listings, 3 table
GCC-Plugin for Automated Accelerator Generation and Integration on Hybrid FPGA-SoCs
In recent years, architectures combining a reconfigurable fabric and a
general purpose processor on a single chip became increasingly popular. Such
hybrid architectures allow extending embedded software with application
specific hardware accelerators to improve performance and/or energy efficiency.
Aiding system designers and programmers at handling the complexity of the
required process of hardware/software (HW/SW) partitioning is an important
issue. Current methods are often restricted, either to bare-metal systems, to
subsets of mainstream programming languages, or require special coding
guidelines, e.g., via annotations. These restrictions still represent a high
entry barrier for the wider community of programmers that new hybrid
architectures are intended for. In this paper we revisit HW/SW partitioning and
present a seamless programming flow for unrestricted, legacy C code. It
consists of a retargetable GCC plugin that automatically identifies code
sections for hardware acceleration and generates code accordingly. The proposed
workflow was evaluated on the Xilinx Zynq platform using unmodified code from
an embedded benchmark suite.Comment: Presented at Second International Workshop on FPGAs for Software
Programmers (FSP 2015) (arXiv:1508.06320
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