17 research outputs found

    An Implantable Versatile Electrode-Driving ASIC for Chronic Epidural Stimulation in Rats

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    This paper presents the design and testing of an electrode driving application specific integrated circuit (ASIC) intended for epidural spinal cord electrical stimulation in rats. The ASIC can deliver up to 1 mA fully programmable monophasic or biphasic stimulus current pulses, to 13 electrodes selected in any possible configuration. It also supports interleaved stimulation. Communication is achieved via only 3 wires. The current source and the control of the stimulation timing were kept off-chip to reduce the heat dissipation close to the spinal cord. The ASIC was designed in a 0.18- \mu m high voltage CMOS process. Its output voltage compliance can be up to 25 V. It features a small core area ( {< } 0.36 mm ^{2} ) and consumes a maximum of 114 \mu W during a full stimulation cycle. The layout of the ASIC was developed to be suitable for integration on the epidural electrode array, and two different versions were fabricated and electrically tested. Results from both versions were almost indistinguishable. The performance of the system was verified for different loads and stimulation parameters. Its suitability to drive a passive epidural 12-electrode array in saline has also been demonstrated

    Advances in Scalable Implantable Systems for Neurostimulation Using Networked ASICs

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    Neurostimulation is a known method for restoring lost functions to neurologically impaired patients. This paper describes recent advances in scalable implantable stimulation systems using networked application specific integrated circuits (ASICs). It discusses how they can meet the ever-growing demand for high-density neural interfacing and long-term reliability. A detailed design example of an implantable (inductively linked) scalable stimulation system for restoring lower limb functions in paraplegics after spinal cord injury is presented. It comprises a central hub implanted at the costal margin and multiple Active Books which provide the interface for stimulating nerve roots in the cauda equina. A 16-channel stimulation system using four Active Books is demonstrated. Each Active Book has an embedded ASIC, which is responsible for initiating stimulus current to the electrodes. It also ensures device safety by monitoring temperature, humidity, and peak electrode voltage during stimulation. The implant hub was implemented using a microcontroller-based circuit. The ASIC in the Active Book was fabricated using XFAB’s 0.6-µm high-voltage CMOS process. The stimulation system does not require an accurate reference clock in the implant. Measured results are provided

    An integrated bidirectional multi-channel opto-electro arbitrary waveform stimulator for treating motor neurone disease

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    This paper presents a prototype integrated bidirectional stimulator ASIC capable of mixed opto-electro stimulation and electrophysiological signal recording. The development is part of the research into a fully implantable device for treating motor neurone disease using optogenetics and stem cell technology. The ASIC consists of 4 stimulator units, each featuring 16-channel optical and electrical stimulation using arbitrary current waveforms with an amplitude up to 16 mA and a frequency from 1.5 Hz to 50 kHz, and a recording front-end with a programmable bandwidth of 1 Hz to 4 kHz, and a programmable amplifier gain up to 74 dB. The ASIC was implemented in a 0.18μm CMOS technology. Simulated performance in stimulation and recording is presented

    Flexible active electrode arrays with ASICs that fit inside the rat's spinal canal

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    Epidural spinal cord electrical stimulation (ESCS) has been used as a means to facilitate locomotor recovery in spinal cord injured humans. Electrode arrays, instead of conventional pairs of electrodes, are necessary to investigate the effect of ESCS at different sites. These usually require a large number of implanted wires, which could lead to infections. This paper presents the design, fabrication and evaluation of a novel flexible active array for ESCS in rats. Three small (1.7 mm2) and thin (100 μm) application specific integrated circuits (ASICs) are embedded in the polydimethylsiloxane-based implant. This arrangement limits the number of communication tracks to three, while ensuring maximum testing versatility by providing independent access to all 12 electrodes in any configuration. Laser-patterned platinum-iridium foil forms the implant’s conductive tracks and electrodes. Double rivet bonds were employed for the dice microassembly. The active electrode array can deliver current pulses (up to 1 mA, 100 pulses per second) and supports interleaved stimulation with independent control of the stimulus parameters for each pulse. The stimulation timing and pulse duration are very versatile. The array was electrically characterized through impedance spectroscopy and voltage transient recordings. A prototype was tested for long term mechanical reliability when subjected to continuous bending. The results revealed no track or bond failure. To the best of the authors’ knowledge, this is the first time that flexible active electrode arrays with embedded electronics suitable for implantation inside the rat’s spinal canal have been proposed, developed and tested in vitro

    A Microchannel Neural Interface ASIC

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    This paper presents an application specific integrated circuit (ASIC) for use in a three-dimensional microchannel neural interface. The device is assembled with seven stacked ASICs with silicone microchannels instrumented in between. Each ASIC comprises tripolar electrodes for seven channels allowing recording or stimulation from any one of the 49 microchannels. The ASIC is implemented in 0.35μm high-voltage CMOS technology and occupies an active area of 4 mm2. The device has been tested demonstrating recording of 1 mV signals, and current controlled stimulation in the range of 5 μA to 500 μA (with 40 V compliance) and up to 50 kHz stimulation frequency. The device overcomes limits on numbers of connected microchannels in previous designs

    Vagus nerve stimulation: State of the art of stimulation and recording strategies to address autonomic function neuromodulation

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    International audienceObjective. Neural signals along the vagus nerve (VN) drive many somatic and autonomic functions. The clinical interest of VN stimulation (VNS) is thus potentially huge and has already been demonstrated in epilepsy. However, side effects are often elicited, in addition to the targeted neuromodulation. Approach. This review examines the state of the art of VNS applied to two emerging modulations of autonomic function: heart failure and obesity, especially morbid obesity. Main results. We report that VNS may benefit from improved stimulation delivery using very advanced technologies. However, most of the results from fundamental animal studies still need to be demonstrated in humans

    An ASIC for Recording and Stimulation in Stacked Microchannel Neural Interfaces

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    This paper presents an active microchannel neural interface (MNI) using seven stacked application specific integrated circuits (ASIC). The approach provides a solution to the present problem of interconnect density in 3-dimensional MNIs. The 4 mm2 ASIC is implemented in 0.35 μm high-voltage CMOS technology. Each ASIC is the base for seven microchannels each with three electrodes in a pseudo-tripolar arrangement. Multiplexing allows stimulating or recording from any one of 49 channels, across 7 ASICs. Connections to the ASICs are made with a 5-line parallel bus. Current controlled biphasic stimulation from 5 μA to 500 μA has been demonstrated with switching between channels and ASICs. The high-voltage technology gives a compliance of 40 V for stimulation, appropriate for the high impedances within microchannels. High frequency biphasic stimulation, up to 40 kHz is achieved, suitable for reversible high frequency nerve blocks. Recording has been demonstrated with mV level signals; common-mode inputs are differentially distorted and limit the CMRR to 40dB. The ASIC has been used in vitro in conjunction with an oversize (2 mm diameter) microchannel in phosphate buffered saline, demonstrating attenuation of interference from outside the microchannel and tripolar recording of signals from within the microchannel. By using 5-lines for 49 active microchannels the device overcomes limitations with connecting many electrodes in a 3-dimensional miniaturised nerve interface

    A Multichannel High-Frequency Power-Isolated Neural Stimulator With Crosstalk Reduction

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    In neuroprostheses applications requiring simultaneous stimulations on a multielectrode array, electric crosstalk, the spatial interaction between electric fields from various electrodes is a major limitation to the performance of multichannel stimulation. This paper presents a multichannel stimulator design that combines high-frequency current stimulation (using biphasic charge-balanced chopped pulse profile) with a switched-capacitor power isolation method. The approach minimizes crosstalk and is particularly suitable for fully integrated realization. A stimulator fabricated in a 0.6 & #x03BC;m CMOS high-voltage technology is presented. It is used to implement a multichannel, high-frequency, power-isolated stimulator. Crosstalk reduction is demonstrated with electrodes in physiological media while the efficacy of the high-frequency stimulator chip is proven in vivo. The stimulator provides fully independent operation on multiple channels and full flexibility in the design of neural modulation protocols

    Four-Wire Interface ASIC for a Multi-Implant Link

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    This paper describes an on-chip interface for recovering power and providing full-duplex communication over an AC-coupled 4-wire lead between active implantable devices. The target application requires two modules to be implanted in the brain (cortex) and upper chest; connected via a subcutaneous lead. The brain implant consists of multiple identical “optrodes” that facilitate a bidirectional neural interface (electrical recording and optical stimulation), and the chest implant contains the power source (battery) and processor module. The proposed interface is integrated within each optrode ASIC allowing full-duplex and fully-differential communication based on Manchester encoding. The system features a head-to-chest uplink data rate (up to 1.6 Mbps) that is higher than that of the chest-to-head downlink (100 kbps), which is superimposed on a power carrier. On-chip power management provides an unregulated 5-V dc supply with up to 2.5-mA output current for stimulation, and two regulated voltages (3.3 and 3 V) with 60-dB power supply rejection ratio for recording and logic circuits. The 4-wire ASIC has been implemented in a 0.35-μm CMOS technology, occupying a 1.5-mm 2 silicon area, and consumes a quiescent current of 91.2 μA. The system allows power transmission with measured efficiency of up to 66% from the chest to the brain implant. The downlink and uplink communication are successfully tested in a system with two optrodes and through a 4-wire implantable lead

    Closed-loop approaches for innovative neuroprostheses

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    The goal of this thesis is to study new ways to interact with the nervous system in case of damage or pathology. In particular, I focused my effort towards the development of innovative, closed-loop stimulation protocols in various scenarios: in vitro, ex vivo, in vivo
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