A flexible low-cost, high-precision, single interface electrical impedance tomography system for breast cancer detection using FPGA

Typically, in multi-frequency Electrical Impedance Tomography (EIT) systems, a current is applied and the voltages developed across the subject are detected. However, due to the complexity of designing stable current sources, there has been mention in the literature of applying a voltage to the subject whilst measuring the consequent current flow. This paper presents a comparative study between the two techniques in a novel design suitable for the detection of breast cancers. The suggested instrument borrows the best features of both the injection of current and the application of voltage, circumventing their limitations. Furthermore, the system has a common patient-electrode interface for both methodologies, whilst the control of the system and the necessary signal processing is carried out in a field programmable gate array (FPGA). Through this novel system, wide-bandwidth, low-noise, as well as high-speed (frame rate) can be achieved

NIKEL_AMC: Readout electronics for the NIKA2 experiment

The New Iram Kid Arrays-2 (NIKA2) instrument has recently been installed at the IRAM 30 m telescope. NIKA2 is a state-of-art instrument dedicated to mm-wave astronomy using microwave kinetic inductance detectors (KID) as sensors. The three arrays installed in the camera, two at 1.25 mm and one at 2.05 mm, feature a total of 3300 KIDs. To instrument these large array of detectors, a specifically designed electronics, composed of 20 readout boards and hosted in three microTCA crates, has been developed. The implemented solution and the achieved performances are presented in this paper. We find that multiplexing factors of up to 400 detectors per board can be achieved with homogeneous performance across boards in real observing conditions, and a factor of more than 3 decrease in volume with respect to previous generations.Comment: 21 pages; 16 figure

Range imager performance comparison in homodyne and heterodyne operating modes

Range imaging cameras measure depth simultaneously for every pixel in a given field of view. In most implementations the basic operating principles are the same. A scene is illuminated with an intensity modulated light source and the reflected signal is sampled using a gain-modulated imager. Previously we presented a unique heterodyne range imaging system that employed a bulky and power hungry image intensifier as the high speed gain-modulation mechanism. In this paper we present a new range imager using an internally modulated image sensor that is designed to operate in heterodyne mode, but can also operate in homodyne mode. We discuss homodyne and heterodyne range imaging, and the merits of the various types of hardware used to implement these systems. Following this we describe in detail the hardware and firmware components of our new ranger. We experimentally compare the two operating modes and demonstrate that heterodyne operation is less sensitive to some of the limitations suffered in homodyne mode, resulting in better linearity and ranging precision characteristics. We conclude by showing various qualitative examples that demonstrate the system’s three-dimensional measurement performance

FPGA-based operational concept and payload data processing for the Flying Laptop satellite

Flying Laptop is the first small satellite developed by the Institute of Space Systems at the Universität Stuttgart. It is a test bed for an on-board computer with a reconfigurable, redundant and self-controlling high computational ability based on the field pro- grammable gate arrays (FPGAs). This Technical Note presents the operational concept and the on-board payload data processing of the satellite. The designed operational concept of Flying Laptop enables the achievement of mission goals such as technical demonstration, scientific Earth observation, and the payload data processing methods. All these capabilities expand its scientific usage and enable new possibilities for real-time applications. Its hierarchical architecture of the operational modes of subsys- tems and modules are developed in a state-machine diagram and tested by means of MathWorks Simulink-/Stateflow Toolbox. Furthermore, the concept of the on-board payload data processing and its implementation and possible applications are described