Design of wireless swallowable capsule with minimum power consumption and high resolution images

Medical technology has undergone major breakthroughs in recent years, especially in the area of the examination tools for diagnostic purposes. The traditional examination method for the diagnosis of gastrointestinal diseases is gastroscopy with the use of an endoscope. Wireless camera pill has created a new perspective for engineers and physicians. After years of great innovation, commercial swallowable pills have been produced and applied in clinical practice. These pills can cover the examination of the gastrointestinal system and provide to the physicians not only a lot more useful data that is not available from the traditional methods, but also elimination of the use of the painful endoscopy procedure. In this paper, a new design of the wireless swallowable pills has been proposed. It takes advantage of the benefits of every sub-system, like camera lenses, image compressor and RF sub-system. In this way our system can provide enough and accurate data to the physicians

Memory-efficient architecture of 2-D dual-mode discrete wavelet transform using lifting scheme for motion-JPEG2000

[[abstract]]In this work, we propose a memory-efficient architecture of lifting based two-dimensional discrete wavelet transform (2D DWT) for motion-JPEG2000. The proposed 2D DWT architecture consists of a 1D row processor, internal memory, and a 1D column processor. The main advantage of this 2D DWT is to reduce the internal memory requirement significantly. For an NtimesN image, only 2N and 4N sizes of internal memory are required for the 5/3 and 9/7 filters, respectively, to perform the one-level 2D DWT decomposition. Moreover, it supports both lossless and lossy operation for 5/3 and 9/7 filters with high operation speed. The proposed 2D DWT surpasses the existed lifting-based designs in the aspects of low internal memory requirement. It is suitable for VLSI implementation and can support various real-time image/video applications such as JPEG2000, motion-JPEG2000, MPEG-4 still texture object decoding, and wavelet-based scalable video coding.[[notice]]需補會議日期、性質、主辦單位[[conferencedate]]20090524~2009052

High speed VLSI architectures for DWT in biometric image compression: A study

AbstractBiometrics is a field that navigates through a vast database and extracts only the qualifying data to accelerate the processes of biometric authentication/recognition. Image compression is a vital part of the process. Various Very Large Scale Integration (VLSI) architectures have emerged to satisfy the real time requirements of the online processing of the applications. This paper studies various techniques that help in realizing the fast operation of the transform stage of the image compression processes. Various parameters that may involve in optimizations for high speed like computing time, silicon area, memory size etc are considered in the survey

Fast Implementation of Lifting Based DWT Architecture For Image Compression

Technological growth in semiconductor industry have led to unprecedented demand for faster area efficient and low power VLSI circuits for complex image processing applications DWT-IDWT is one of the most popular IP that is used for image transformation In this work a high speed low power DWT IDWT architecture is designed and implemented on ASIC using 130nm Technology 2D DWT architecture based on lifting scheme architecture uses multipliers and adders thus consuming power This paper addresses power reduction in multiplier by proposing a modified algorithm for BZFAD multiplier The proposed BZFAD multiplier is 65 faster and occupies 44 less area compared with the generic multipliers The DWT architecture designed based on modified BZFAD multiplier achieves 35 less power reduction and operates at frequency of 200MHz with latency of 1536 clock cycles for 512x512 image The developed DWT can be used as an IP for VLSI implementatio