Entangled Photon Pair Source Demonstrator using the Quantum Instrumentation Control Kit System

We report the first demonstration of using the Quantum Instrumentation and Control Kit (QICK) system on RFSoCFPGA technology to drive an entangled photon pair source and to detect the photon signals. With the QICK system, we achieve high levels of performance metrics including coincidence-to-accidental ratio exceeding 150, and entanglement visibility exceeding 95%, consistent with performance metrics achieved using conventional waveform generators. We also demonstrate simultaneous detector readout using the digitization functional of QICK, achieving internal system synchronization time resolution of 3.2 ps. The work reported in this paper represents an explicit demonstration of the feasibility for replacing commercial waveform generators and time taggers with RFSoC-FPGA technology in the operation of a quantum network, representing a cost reduction of more than an order of magnitude

Frequency-Multiplexed Array Digitization for MIMO Receivers: 4-Antennas/ADC at 28 GHz on Xilinx ZCU-1285 RF SoC

Communications at mm-wave frequencies and above rely heavily on beamforming antenna arrays. Typically, hundreds, if not thousands, of independent antenna channels are used to achieve high SNR for throughput and increased capacity. Using a dedicated ADC per antenna receiver is preferable but it\u27s not practical for very large arrays due to unreasonable cost and complexity. Frequency division multiplexing (FDM) is a well-known technique for combining multiple signals into a single wideband channel. In a first of its kind measurements, this paper explores FDM for combining multiple antenna outputs at IF into a single wideband signal that can be sampled and digitized using a high-speed wideband ADC. The sampled signals are sub-band filtered and digitally down-converted to obtain individual antenna channels. A prototype receiver was realized with a uniform linear array consisting of 4 elements with 250 MHz bandwidth per channel at 28 GHz carrier frequency. Each of the receiver chains were frequency-multiplexed at an intermediate frequency of 1 GHz to avoid the requirement for multiple, precise local oscillators (LOs). Combined narrowband receiver outputs were sampled using a single ADC with digital front-end operating on a Xilinx ZCU-1285 RF SoC FPGA to synthesize 4 digital beams. The approach allows $M$ -fold increase in spatial degrees of freedom per ADC, for temporal oversampling by a factor of $M$

Design and analysis of digital communication within an SoC-based control system for trapped-ion quantum computing

Electronic control systems used for quantum computing have become increasingly complex as multiple qubit technologies employ larger numbers of qubits with higher fidelity targets. Whereas the control systems for different technologies share some similarities, parameters like pulse duration, throughput, real-time feedback, and latency requirements vary widely depending on the qubit type. In this paper, we evaluate the performance of modern System-on-Chip (SoC) architectures in meeting the control demands associated with performing quantum gates on trapped-ion qubits, particularly focusing on communication within the SoC. A principal focus of this paper is the data transfer latency and throughput of several high-speed on-chip mechanisms on Xilinx multi-processor SoCs, including those that utilize direct memory access (DMA). They are measured and evaluated to determine an upper bound on the time required to reconfigure a gate parameter. Worst-case and average-case bandwidth requirements for a custom gate sequencer core are compared with the experimental results. The lowest-variability, highest-throughput data-transfer mechanism is DMA between the real-time processing unit (RPU) and the PL, where bandwidths up to 19.2 GB/s are possible. For context, this enables reconfiguration of qubit gates in less than 2\mics\!, comparable to the fastest gate time. Though this paper focuses on trapped-ion control systems, the gate abstraction scheme and measured communication rates are applicable to a broad range of quantum computing technologies

Algorithms and Circuits for Analog-Digital Hybrid Multibeam Arrays

Fifth generation (5G) and beyond wireless communication systems will rely heavily on larger antenna arrays combined with beamforming to mitigate the high free-space path-loss that prevails in millimeter-wave (mmW) and above frequencies. Sharp beams that can support wide bandwidths are desired both at the transmitter and the receiver to leverage the glut of bandwidth available at these frequency bands. Further, multiple simultaneous sharp beams are imperative for such systems to exploit mmW/sub-THz wireless channels using multiple reflected paths simultaneously. Therefore, multibeam antenna arrays that can support wider bandwidths are a key enabler for 5G and beyond systems. In general, N-beam systems using N-element antenna arrays will involve circuit complexities of the order of N2. This dissertation investigates new analog, digital and hybrid low complexity multibeam beamforming algorithms and circuits for reducing the associated high size, weight, and power (SWaP) complexities in larger multibeam arrays. The research efforts on the digital beamforming aspect propose the use of a new class of discrete Fourier transform (DFT) approximations for multibeam generation to eliminate the need for digital multipliers in the beamforming circuitry. For this, 8-, 16- and 32-beam multiplierless multibeam algorithms have been proposed for uniform linear array applications. A 2.4 GHz 16-element array receiver setup and a 5.8 GHz 32-element array receiver system which use field programmable gate arrays (FPGAs) as digital backend have been built for real-time experimental verification of the digital multiplierless algorithms. The multiplierless algorithms have been experimentally verified by digitally measuring beams. It has been shown that the measured beams from the multiplierless algorithms are in good agreement with the exact counterpart algorithms. Analog realizations of the proposed approximate DFT transforms have also been investigated leading to low-complex, high bandwidth circuits in CMOS. Further, a novel approach for reducing the circuit complexity of analog true-time delay (TTD) N-beam beamforming networks using N-element arrays has been proposed for wideband squint-free operation. A sparse factorization of the N-beam delay Vandermonde beamforming matrix is used to reduce the total amount of TTD elements that are needed for obtaining N number of beams in a wideband array. The method has been verified using measured responses of CMOS all-pass filters (APFs). The wideband squint-free multibeam algorithm is also used to propose a new low-complexity hybrid beamforming architecture targeting future 5G mmW systems. Apart from that, the dissertation also explores multibeam beamforming architectures for uniform circular arrays (UCAs). An algorithm having N log N circuit complexity for simultaneous generation of N-beams in an N-element UCA is explored and verified

실시간 근거리 영상화를 위한 MIMO 역합성 개구 레이더 시스템

학위논문(박사) -- 서울대학교대학원 : 공과대학 전기·정보공학부, 2022. 8. 남상욱.Microwave and millimeter wave (micro/mmW) imaging systems have advantages over other imaging systems in that they have penetration properties over non-metallic structures and non-ionization. However, these systems are commercially applicable in limited areas. Depending on the quality and size of the images, a system can be expensive and images cannot be provided in real-time. To overcome the challenges of the current micro/mmW imaging system, it is critical to suggest a new system concept and prove its potential benefits and hazards by demonstrating the testbed. This dissertation presents Ku1DMIC, a wide-band micro/mmW imaging system using Ku-band and 1D-MIMO array, which can overcome the challenges above. For cost-effective 3D imaging capabilities, Ku1DMIC uses 1D-MIMO array configuration and inverse synthetic aperture radar (ISAR) technique. At the same time, Ku1DMIC supports real-time data acquisition through a system-level design of a seamless interface with frequency modulated continuous wave (FMCW) radar. To show the feasibility of 3D imaging with Ku1DMIC and its real-time capabilities, an accelerated imaging algorithm, 1D-MIMO-ISAR RSA, is proposed and demonstrated. The detailed contributions of the dissertation are as follows. First, this dissertation presents Ku1DMIC – a Ku-band MIMO frequency-modulated continuous-wave (FMCW) radar experimental platform with real-time 2D near-field imaging capabilities. The proposed system uses Ku-band to cover the wider illumination area given the limited number of antennas and uses a fast ramp and wide-band FMCW waveform for rapid radar data acquisition while providing high-resolution images. The key design aspect behind the platform is stability, reconfigurability, and real-time capabilities, which allows investigating the exploration of the system’s strengths and weaknesses. To satisfy the design aspect, a digitally assisted platform is proposed and realized based on an AMD-Xilinx UltraScale+ Radio Frequency System on Chip (RFSoC). The experimental investigation for real-time 2D imaging has proved the ability of video-rate imaging at around 60 frames per second. Second, a waveform digital pre-distortion (DPD) method and calibration method are proposed to enhance the image quality. Even if a clean FMCW waveform is generated with the aid of the optimized waveform generator, the signal will inevitably suffer from distortion, especially in the RF subsystem of the platform. In near-field imaging applications, the waveform DPD is not effective at suppressing distortion in wide-band FMCW radar systems. To solve this issue, the LO-DPD architecture and binary search based DPD algorithm are proposed to make the waveform DPD effective in Ku1DMIC. Furthermore, an image-domain optimization correction method is proposed to compensate for the remaining errors that cannot be eliminated by the waveform DPD. For robustness to various unwanted signals such as noise and clutter signals, two regularized least squares problems are applied and compared: the generalized Tikhonov regularization and the total variation (TV) regularization. Through various 2D imaging experiments, it is confirmed that both methods can enhance the image quality by reducing the sidelobe level. Lastly, the research is conducted to realize real-time 3D imaging by applying the ISAR technique to Ku1DMIC. The realization of real-time 3D imaging using 1D-MIMO array configuration is impactful in that this configuration can significantly reduce the costs of the 3D imaging system and enable imaging of moving objects. To this end, the signal model for the 1D-MIMO-ISAR configuration is presented, and then the 1D-MIMO-ISAR range stacking algorithm (RSA) is proposed to accelerate the imaging reconstruction process. The proposed 1D-MIMO-ISAR RSA can reconstruct images within hundreds of milliseconds while maintaining almost the same image quality as the back-projection algorithm, bringing potential use for real-time 3D imaging. It also describes strategies for setting ROI, considering the real-world situations in which objects enter and exit the field of view, and allocating GPU memory. Extensive simulations and experiments have demonstrated the feasibility and potential benefits of 1D-MIMO-IASR configuration and 1D-MIMO-ISAR RSA.마이크로파 및 밀리미터파(micro/mmW) 영상화 시스템은 비금속 구조 및 비이온화에 비해 침투 특성이 있다는 점에서 다른 이미징 시스템에 비해 장점이 있다. 그러나 이러한 시스템은 제한된 영역에서만 상업적으로 적용되고 있다. 이미지의 품질과 크기에 따라 시스템이 매우 고가일 수 있으며 이미지를 실시간으로 제공할 수 없는 현황이다. 현재의 micro/mmW 이미징 시스템의 문제를 극복하려면 새로운 시스템 개념을 제안하고 테스트베드를 시연하여 잠재적인 이점과 위험을 입증하는 것이 중요하다. 본 논문에서는 Ku-band와 1D-MIMO 어레이를 이용한 광대역 micro/mmW 이미징 시스템인 Ku1DMIC를 제안하여 위와 같은 문제점을 극복할 수 있다. 비용 효율적인 3차원 영상화 기능을 위해 Ku1DMIC는 1D-MIMO 배열 기술과 ISAR(Inverse Synthetic Aperture Radar) 기술을 사용한다. 동시에 Ku1DMIC는 주파수 변조 연속파 (FMCW) 레이더와의 원활한 인터페이스의 시스템 수준 설계를 통해 실시간 데이터 수집을 지원한다. Ku1DMIC를 사용한 3차원 영상화의 구현 및 실시간 기능의 가능성을 보여주기 위해, 2차원 영상화를 위한 1D-MIMO RSA과 3차원 영상화를 위한 1D-MIMO-ISAR RSA가 제안되고 Ku1DMIC에서 구현된다. 따라서, 본 학위 논문의 주요 기여는 Ku-band 1D-MIMO 배열 기반 영상화 시스템 프로토타입을 개발 및 테스트하고, ISAR 기반 3차원 영상화 기능을 검사하고, 실시간 3차원 영상화 가능성을 조사하는 것이다. 이에 대한 세부적인 기여 항목은 다음과 같다. 첫째, 실시간 2D 근거리장 이미징 기능을 갖춘 Ku 대역 MIMO 주파수 변조 연속파(FMCW) 레이더 실험 플랫폼인 Ku1DMIC를 제시한다. 제안하는 시스템은 제한된 수의 안테나에서 더 넓은 조명 영역을 커버하기 위해 Ku 대역을 사용하고 고해상도 이미지를 제공하면서 빠른 레이더 데이터 수집을 위해 고속 램프 및 광대역 FMCW 파형을 사용한다. 플랫폼의 핵심 설계 원칙은 안정성, 재구성 가능성 및 실시간 기능으로 시스템의 강점과 약점을 광범위하게 탐색한다. 설계 원칙을 만족시키기 위해 AMD-Xilinx UltraScale+ RFSoC(Radio Frequency System on Chip)를 기반으로 디지털 지원 플랫폼을 제안하고 구현한다. 실시간 2D 이미징에 대한 실험적 조사는 초당 약 60프레임에서 비디오 속도 이미징의 능력을 입증했다. 둘째, 영상 품질 향상을 위한 파형 디지털 전치왜곡(DPD) 방법과 보정 방법을 제안한다. 최적화된 파형 발생기의 도움으로 깨끗한 FMCW 파형이 생성되더라도 특히 플랫폼의 RF 하위 시스템에서 신호는 필연적으로 왜곡을 겪게된다. 근거리 영상화 응용 분야에서는 파형 DPD는 광대역 FMCW 레이더 시스템의 왜곡을 억제하는 데 효과적이지 않다. 이 문제를 해결하기 위해 Ku1DMIC에서 파형 DPD가 유효하도록 LO-DPD 아키텍처와 이진 탐색 기반 DPD 알고리즘을 제안한다. 또한, 파형 DPD로 제거할 수 없는 나머지 오류를 보상하기 위해 이미지 영역 최적화 보정 방법을 제안한다. 노이즈 및 클러터 신호와 같은 다양한 원치 않는 신호에 대한 견고성을 위해 일반화된 Tikhonov 정규화 및 전체 변동(TV) 정규화라는 두 가지 정규화된 최소 자승 문제를 적용 후 비교한다. 다양한 2차원 영상화 실험을 통해 두 방법 모두 부엽 레벨을 줄여 화질을 향상시킬 수 있음을 확인한다. 마지막으로, ISAR 기법을 2차원 영상 플랫폼에 적용하여 실시간 3차원 영상을 구현하기 위한 연구를 진행한다. 1D-MIMO-ISAR 구성에서 실시간 3D 이미징의 구현은 이러한 구성이 3D 이미징 시스템의 비용을 크게 줄일 수 있다는 점에서 영향력이 있다. 따라서 이 논문에서는 1D-MIMO-ISAR 구성에 대한 이미징 재구성을 가속화하기 위해 1D-MIMO-ISAR 범위 스태킹 알고리즘(RSA)을 제안한다. 제안된 1D-MIMO-ISAR RSA는 널리 알려진 Back-Projection 알고리즘과 거의 동일한 이미지 품질을 유지하면서도 수백 밀리초 이내에 이미지를 재구성함으로써 실시간 영상화에 대한 가능성을 보여준다. 또한 물체가 시야에 들어오고 나가는 실제 상황을 고려하기 위한 ROI 설정, 그리고 메모리 할당에 대한 전략을 설명한다. 광범위한 시뮬레이션과 실험을 통해 1D-MIMO-IASR 구성 및 1D-MIMO-ISAR RSA의 가능성과 잠재적 이점을 확인한다.1 INTRODUCTION 1 1.1 Microwave and millimeter-wave imaging 1 1.2 Imaging with radar system 2 1.3 Challenges and motivation 5 1.4 Outline of the dissertation 8 2 FUNDAMENTAL OF TWO-DIMENSIONAL IMAGING USING A MIMO RADAR 9 2.1 Signal model 9 2.2 Consideration of waveform 12 2.3 Image reconstruction algorithm 16 2.3.1 Back-projection algorithm 16 2.3.2 1D-MIMO range-migration algorithm 20 2.3.3 1D-MIMO range stacking algorithm 27 2.4 Sampling criteria and resolution 31 2.5 Simulation results 36 3 MIMO-FMCW RADAR IMPLEMENTATION WITH 16 TX - 16 RX ONE- DIMENSIONAL ARRAYS 46 3.1 Wide-band FMCW waveform generator architecture 46 3.2 Overall system architecture 48 3.3 Antenna and RF transceiver module 53 3.4 Wide-band FMCW waveform generator 55 3.5 FPGA-based digital hardware design 63 3.6 System integration and software design 71 3.7 Testing and measurement 75 3.7.1 Chirp waveform measurement 75 3.7.2 Range profile measurement 77 3.7.3 2-D imaging test 79 4 METHODS OF IMAGE QUALITY ENHANCEMENT 84 4.1 Signal model 84 4.2 Digital pre-distortion of chirp signal 86 4.2.1 Proposed DPD hardware system 86 4.2.2 Proposed DPD algorithm 88 4.2.3 Measurement results 90 4.3 Robust calibration method for signal distortion 97 4.3.1 Signal model 98 4.3.2 Problem formulation 99 4.3.3 Measurement results 105 5 THREE-DIMENSIONAL IMAGING USING 1-D ARRAY SYSTEM AND ISAR TECHNIQUE 110 5.1 Formulation for 1D-MIMO-ISAR RSA 111 5.2 Algorithm implementation 114 5.3 Simulation results 120 5.4 Experimental results 122 6 CONCLUSIONS AND FUTURE WORK 127 6.1 Conclusions 127 6.2 Future work 129 6.2.1 Effects of antenna polarization in the Ku-band 129 6.2.2 Forward-looking near-field ISAR configuration 130 6.2.3 Estimation of the movement errors in ISAR configuration 131 Abstract (In Korean) 145 Acknowlegement 148박

Getting better all the time - The Continued Evolution of the GNSS Software-Defined Radio

Software Defined Radio (SDR) has an infinite number of interpretations depending on the context in which it is designed and used. By way of a starting definition the authors choose to use that of ‘a reconfigurable radio system whose characteristics are partially or fully defined via software or firmware’. In various forms, SDR has permeated a wide range of user groups, from military, business, academia and to the amateur radio enthusiast

Evolutionary Trends in True Time Delay Line Technologies for Timed Array Radars

Timed array technology is rapidly evolving in multiple areas such as high resolution imaging radar, automotive, medical, high data rate communication applications etc. Timed arrays by utilising True Time Delay (TTD) lines in place of phase shifters mitigate beam squint and pulse dispersion issues associated with wide instantaneous bandwidth arrays. This paper presents on review of evolutionary trends in TTD line architectures starting from coaxial cable to photonic integrated circuit. The paper also reports on critical parameters of TTD lines, their importance and implication in design of typical X-band imaging radar. Comparison of different TTD line architectures in terms of configuration, implementation, merits and demerits are discussed in detail for wideband array application. The paper also brings out the integration aspects of TTD lines as part of T/R modules and proposes suitable design schemes towards performance optimization and realisation of timed arrays

High-Performance Computing for SKA Transient Search: Use of FPGA based Accelerators -- a brief review

This paper presents the High-Performance computing efforts with FPGA for the accelerated pulsar/transient search for the SKA. Case studies are presented from within SKA and pathfinder telescopes highlighting future opportunities. It reviews the scenario that has shifted from offline processing of the radio telescope data to digitizing several hundreds/thousands of antenna outputs over huge bandwidths, forming several 100s of beams, and processing the data in the SKA real-time pulsar search pipelines. A brief account of the different architectures of the accelerators, primarily the new generation Field Programmable Gate Array-based accelerators, showing their critical roles to achieve high-performance computing and in handling the enormous data volume problems of the SKA is presented here. It also presents the power-performance efficiency of this emerging technology and presents potential future scenarios.Comment: Accepted for JoAA, SKA Special issue on SKA (2022

A Primer on Software Defined Radios

The commercial success of cellular phone systems during the late 1980s and early 1990 years heralded the wireless revolution that became apparent at the turn of the 21st century and has led the modern society to a highly interconnected world where ubiquitous connectivity and mobility are enabled by powerful wireless terminals. Software defined radio (SDR) technology has played a major role in accelerating the pace at which wireless capabilities have advanced, in particular over the past 15 years, and SDRs are now at the core of modern wireless communication systems. In this paper we give an overview of SDRs that includes a discussion of drivers and technologies that have contributed to their continuous advancement, and presents the theory needed to understand the architecture and operation of current SDRs. We also review the choices for SDR platforms and the programming options that are currently available for SDR research, development, and teaching, and present case studies illustrating SDR use. Our hope is that the paper will be useful as a reference to wireless researchers and developers working in the industry or in academic settings on further advancing and refining the capabilities of wireless systems