All-Digital Self-interference Cancellation Technique for Full-duplex Systems

Full-duplex systems are expected to double the spectral efficiency compared to conventional half-duplex systems if the self-interference signal can be significantly mitigated. Digital cancellation is one of the lowest complexity self-interference cancellation techniques in full-duplex systems. However, its mitigation capability is very limited, mainly due to transmitter and receiver circuit's impairments. In this paper, we propose a novel digital self-interference cancellation technique for full-duplex systems. The proposed technique is shown to significantly mitigate the self-interference signal as well as the associated transmitter and receiver impairments. In the proposed technique, an auxiliary receiver chain is used to obtain a digital-domain copy of the transmitted Radio Frequency (RF) self-interference signal. The self-interference copy is then used in the digital-domain to cancel out both the self-interference signal and the associated impairments. Furthermore, to alleviate the receiver phase noise effect, a common oscillator is shared between the auxiliary and ordinary receiver chains. A thorough analytical and numerical analysis for the effect of the transmitter and receiver impairments on the cancellation capability of the proposed technique is presented. Finally, the overall performance is numerically investigated showing that using the proposed technique, the self-interference signal could be mitigated to ~3dB higher than the receiver noise floor, which results in up to 76% rate improvement compared to conventional half-duplex systems at 20dBm transmit power values.Comment: Submitted to IEEE Transactions on Wireless Communication

Reference Receiver Based Digital Self-Interference Cancellation in MIMO Full-Duplex Transceivers

In this paper we propose and analyze a novel self-interference cancellation structure for in-band MIMO full-duplex transceivers. The proposed structure utilizes reference receiver chains to obtain reference signals for digital self-interference cancellation, which means that all the transmitter-induced nonidealities will be included in the digital cancellation signal. To the best of our knowledge, this type of a structure has not been discussed before in the context of full-duplex transceivers. First, we will analyze the overall achievable performance of the proposed cancellation scheme, while also providing some insight into the possible bottlenecks. We also provide a detailed formulation of the actual cancellation procedure, and perform an analysis into the effect of the received signal of interest on self-interference coupling channel estimation. The achieved performance of the proposed reference receiver based digital cancellation procedure is then assessed and verified with full waveform simulations. The analysis and waveform simulation results show that under practical transmitter RF/analog impairment levels, the proposed reference receiver based cancellation architecture can provide substantially better self-interference suppression than any existing solution, despite deploying only low-complexity linear digital processing.Comment: 7 pages, 4 figures. To be presented in the 2014 IEEE Broadband Wireless Access Worksho

Prototyping and Experimentation of a Closed-Loop Wireless Power Transmission with Channel Acquisition and Waveform Optimization

A systematic design of adaptive waveform for Wireless Power Transfer (WPT) has recently been proposed and shown through simulations to lead to significant performance benefits compared to traditional non-adaptive and heuristic waveforms. In this study, we design the first prototype of a closed-loop wireless power transfer system with adaptive waveform optimization based on Channel State Information acquisition. The prototype consists of three important blocks, namely the channel estimator, the waveform optimizer, and the energy harvester. Software Defined Radio (SDR) prototyping tools are used to implement a wireless power transmitter and a channel estimator, and a voltage doubler rectenna is designed to work as an energy harvester. A channel adaptive waveform with 8 sinewaves is shown through experiments to improve the average harvested DC power at the rectenna output by 9.8% to 36.8% over a non-adaptive design with the same number of sinewaves.Comment: accepted for publication in IEEE WPTC 201

A Software-Defined Multi-Element VLC Architecture

In the modern era of radio frequency (RF) spectrum crunch, visible light communication (VLC) is a recent and promising alternative technology that operates at the visible light spectrum. Thanks to its unlicensed and large bandwidth, VLC can deliver high throughput, better energy efficiency, and low cost data communications. In this article, a hybrid RF/VLC architecture is considered that can simultaneously provide light- ing and communication coverage across a room. Considered architecture involves a novel multi-element hemispherical bulb design, which can transmit multiple data streams over light emitting diode (LED) modules. Simulations considering various VLC transmitter configurations and topologies show that good link quality and high spatial reuse can be maintained in typical indoor communication scenarios

A fully integrated 24-GHz phased-array transmitter in CMOS

This paper presents the first fully integrated 24-GHz phased-array transmitter designed using 0.18-/spl mu/m CMOS transistors. The four-element array includes four on-chip CMOS power amplifiers, with outputs matched to 50 /spl Omega/, that are each capable of generating up to 14.5 dBm of output power at 24 GHz. The heterodyne transmitter has a two-step quadrature up-conversion architecture with local oscillator (LO) frequencies of 4.8 and 19.2 GHz, which are generated by an on-chip frequency synthesizer. Four-bit LO path phase shifting is implemented in each element at 19.2 GHz, and the transmitter achieves a peak-to-null ratio of 23 dB with raw beam-steering resolution of 7/spl deg/ for radiation normal to the array. The transmitter can support data rates of 500 Mb/s on each channel (with BPSK modulation) and occupies 6.8 mm /spl times/ 2.1 mm of die area

Wireless information and power transfer: from scientific hypothesis to engineering practice

Recently, there has been substantial research interest in the subject of Simultaneous Wireless Information andPower Transfer (SWIPT) owing to its cross-disciplinary appeal and its wide-ranging application potential, whichmotivates this overview. More explicitly, we provide a brief survey of the state-of-the-art and introduce severalpractical transceiver architectures that may facilitate its implementation. Moreover, the most important link-levelas well as system-level design aspects are elaborated on, along with a variety of potential solutions and researchideas. We envision that the dual interpretation of Radio Frequency (RF) signals creates new opportunities as wellas challenges requiring substantial research, innovation and engineering efforts