An adiabatic charge pump based charge recycling design style

A typical CMOS gate draws charge equal to C[subscript L]Vdd2 from the power supply (Vdd) where C[subscript L] is the load capacitance. Half of the energy is dissipated in the pull-up p-type network, and the other half is dissipated in the pull-down n-type network. Adiabatic CMOS circuit reduces the dissipated energy by providing the charge at a rate significantly lower than the inherent RC delay of the gate. The charge can also be recovered with an RLC oscillator based power supply. However, the two main problems with adiabatic design style are the design of a high frequency RLC oscillator for the power supply, and the need to slow down the rate of charge supply for lower energy. This reduction in speed of operation renders this adiabatic technique inapplicable in certain situations. A new approach incorporating an adiabatic charge pump that moves the slower adiabatic components away from the critical path of the logic is proposed in this work. The adiabatic delays of a charge pump are overlapped with the computing path logic delays. Hence, the proposed charge pump based recycling technique is especially effective for pipelined datapath computations (digital signal processing, DSP, is such a domain) where timing considerations are important. Also the proposed design style does not interfere with the critical path of the system, and hence the delay introduced by this scheme does not reduce the overall computational speed. In this work, we propose one implementation schema that involves tapping the ground-bound charge in a capacitor (virtual ground) and using an adiabatic charge-pump circuit to feed internal virtual power supplies. As the design relies on leakage charge to generate virtual power supplies, it is most effective in large circuits that undergo considerable switching activity resulting in substantial charge tapping by the proposed scheme. The proposed method has been implemented in DSP applications like FIR filter, DCT/IDCT filters and FFT filters. Simulations results in SPICE indicate that the proposed scheme reduces energy consumption in these DSP circuits by as much as 18% with no loss in performance, paving way for a new approach towards conserving energy in complex digital systems

A Charge-Recycling Scheme and Ultra Low Voltage Self-Startup Charge Pump for Highly Energy Efficient Mixed Signal Systems-On-A-Chip

The advent of battery operated sensor-based electronic systems has provided a pressing need to design energy-efficient, ultra-low power integrated circuits as a means to improve the battery lifetime. This dissertation describes a scheme to lower the power requirement of a digital circuit through the use of charge-recycling and dynamic supply-voltage scaling techniques. The novel charge-recycling scheme proposed in this research demonstrates the feasibility of operating digital circuits using the charge scavenged from the leakage and dynamic load currents inherent to digital design. The proposed scheme efficiently gathers the “ground-bound” charge into storage capacitor banks. This reclaimed charge is then subsequently recycled to power the source digital circuit. The charge-recycling methodology has been implemented on a 12-bit Gray-code counter operating at frequencies of less than 50 MHz. The circuit has been designed in a 90-nm process and measurement results reveal more than 41% reduction in the average energy consumption of the counter. The total energy savings including the power consumed for the generation of control signals aggregates to an average of 23%. The proposed methodology can be applied to an existing digital path without any design change to the circuit but with only small loss to the performance. Potential applications of this scheme are described, specifically in wide-temperature dynamic power reduction and as a source for energy harvesters. The second part of this dissertation deals with the design and development of a self-starting, ultra-low voltage, switched-capacitor (SC) DC-DC converter that is essential to an energy harvesting system. The proposed charge-pump based SC-converter operates from 125-mV input and thus enables battery-less operation in ultra-low voltage energy harvesters. The charge pump does not require any external components or expensive post-fabrication processing to enable low-voltage operation. This design has been implemented in a 130-nm CMOS process. While the proposed charge pump provides significant efficiency enhancement in energy harvesters, it can also be incorporated within charge recycling systems to facilitate adaptable charge-recycling levels. In total, this dissertation provides key components needed for highly energy-efficient mixed signal systems-on-a-chip

A Low Power FinFET Charge Pump For Energy Harvesting Applications

Indiana University-Purdue University Indianapolis (IUPUI)With the growing popularity and use of devices under the great umbrella that is the Internet of Things (IoT), the need for devices that are smaller, faster, cheaper and require less power is at an all time high with no intentions of slowing down. This is why many current research efforts are very focused on energy harvesting. Energy harvesting is the process of storing energy from external and ambient sources and delivering a small amount of power to low power IoT devices such as wireless sensors or wearable electronics. A charge pumps is a circuit used to convert a power supply to a higher or lower voltage depending on the specific application. Charge pumps are generally seen in memory design as a verity of power supplies are required for the newer memory technologies. Charge pumps can be also be designed for low voltage operation and can convert a smaller energy harvesting voltage level output to one that may be needed for the IoT device to operate. In this work, an integrated FinFET (Field Effect Transistor) charge pump for low power energy harvesting applications is proposed. The design and analysis of this system was conducted using Cadence Virtuoso Schematic L-Editing, Analog Design Environment and Spectre Circuit Simulator tools using the 7nm FinFETs from the ASAP7 7nm PDK. The research conducted here takes advantage of some inherent characteristics that are present in FinFET technologies, including low body effects, and faster switching speeds, lower threshold voltage and lower power consumption. The lower threshold voltage of the FinFET is key to get great performance at lower supply voltages. The charge pump in this work is designed to pump a 150mV power supply, generated from an energy harvester, to a regulated 650mV, while supplying 1uA of load current, with a 20mV voltage ripple in steady state (SS) operation. At these conditions, the systems power consumption is 4.85uW and is 31.76% efficient. Under no loading conditions, the charge pump reaches SS operation in 50us, giving it the fastest rise time of the compared state of the art efforts mentioned in this work. The minimum power supply voltage for the system to function is 93mV where it gives a regulated output voltage of $25mV. FinFET technology continues to be a very popular design choice and even though it has been in production since Intel's Ivy-Bridge processor in 2012, it seems that very few efforts have been made to use the advantages of FinFETs for charge pump design. This work shows though simulation that FinFET charge pumps can match the performance of charge pumps implemented in other technologies and should be considered for low power designs such as energy harvesting

A comparative analysis and optimisation of thermo-mechanical energy storage technologies

Electrical Energy Storage (EES) can decouple energy production from its consumption and is urgently needed by both conventional energy system for load leveling and renewable energy system for intermittency smoothing. Currently, Pumped Hydro Energy Storage (PHES) and Compressed Air Energy Storage (CAES) are the main technologies employed, but they both suffer from high capital cost, geographical constraints and environmental issues. Therefore, many innovative concepts of EES technologies have been proposed recently, including the Adiabatic Compressed Air Energy Storage (A-CAES), Pumped Thermal Energy Storage (PTES), Isothermal Compressed Air Energy Storage (I-CAES) and Liquid Air Energy Storage (LAES). All of these EES store electricity in the forms of thermal or mechanical energy, and are most suitable for large-scale energy storage. As a result, they have received intensive treatment from both the industry and academia, but a comparative study and optimization of these large-scale thermo-mechanical energy storage systems from a thermo-economic perspective has so far been lacking, which forms the major part of this thesis. In this thesis, a complete set of system models have been developed for each EES technology, incorporating both thermodynamic and economic factors with due consideration for the constraints and variation ranges of each parameter. Then parametric studies are carried out for each system to analyze the impact of each parameter on the system performance (e.g., efficiency and unit cost). Loss and cost distributions are given for the representative cases, and the detailed explanation and potential improvement are also provided. After that, thermoeconomic optimizations are carried out for each individual system, and the trade-off between efficiency and unit cost as well as the main factors controlling this trade-off are revealed. Finally, these optimized systems are compared with each other, and new EES systems that combined the merits of existing ones are proposed as well. The results show that A-CAES and I-CAES tend to have higher system efficiency and lower unit cost than PTES and LAES, but the PTES and LAES enjoys higher energy density and more siting freedom. More information about the component efficiency and cost is required for an accurate comparison between A-CAES and I-CAES, and between PTES and LAES

Vehicle energy usage

The waste heat from exhaust gases and cooling systems of internal combustion engines can be an important heat source to provide additional power and improve engine overall efficiency. Developments and efficiency improvements in thermal electric generator technology has made recycling of this previously ignored energy source a viable proposition. In this research project a design of an exhaust gas thermal electric generator is proposed. A computer simulation using CFD software ANSYS16.1 is conducted to estimate the expected performance of the system. It is proposed that the Thermal electric generator output be used to charge the vehicle battery and thereby replace the conventional vehicle charging system. Additionally due to the continuous nature of the electrical power output it is proposed that electrical power also be utilized to power a hydrogen generation unit which will allow a controlled amount of hydrogen / oxygen mixture back into the engine under light throttle and lean burn conditions. The design presented is estimated to produce a maximum power output of 2407 watts. This power output is comparable to that of a conventional vehicle charging system. The TEG design presented could be a suitable substitute for a conventional charging system. Additionally there are extensive fuel economy and emissions benefits in using the excess electrical power generated to power an electrolysis driven hydrogen generating cell

Ohutfilmihaiduttimen mallintaminen ionisen nesteen kierrättämiseksi

World demand for textiles is on the rise and there is a need for fiber source that does not require arable land. Ioncell-F is a novel method of producing fiber from pulp. It uses ionic liquid [DBNH][OAc] to dissolve cellulose. Ionic liquid is expensive so it has to be recycled to make the process economical. Ionic liquid is thermally unstable, therefore the recycling has to be done with moderate temperatures. One way to separate and recycle ionic liquid from water is thin film evaporation. The purpose of this study was to model the evaporation of water from water/[DBNH][OAc] mixture in an agitated thin film evaporator in flowsheet simulator Aspen Plus. Accurate modeling of the evaporator is needed to design and optimize the recycling process. The study also studied the applicability of multiple-effect evaporation. Various modeling approaches were studied to simulate the thin film evaporator and an Aspen Plus model was developed based on batch distillation theory. The performance of the model was compared to an earlier developed model based on flash drum model and experimental data. The batch model gave more accurate results than the often used flash model. The model did not include the hydrolysis product of the ionic liquid, implementation of which should be the focus in future works. A case study was conducted and the applicability of double-effect evaporation was tested with the model. A rapid boiling point elevation at low water concentrations made it harder to implement multiple-effect evaporation in recycling of the ionic liquid. It could be done with right pressure and temperature settings for most of the evaporation, with one additional evaporator to achieve desired water content. Multiple-effect evaporation proved useful in both achieving purer vapor and lowering the total required heating power.Maailmanlaajuinen tekstiilin kysyntä on kasvussa, ja tekstiilin lähteeksi tarvitaan raaka-aineita, jotka eivät vie tilaa viljeltävältä maalta. Ioncell-F on uusi prosessi, joka voi tuottaa kuitua sellusta. Se käyttää ionista nestettä [DBNH][OAc] liuottaakseen selluloosan. Ioninen neste on kallista, joten se täytyy erottaa vedestä ja kierrättää, jotta prosessi on kannattava. Se kuitenkin myös hajoaa korkeissa lämpötiloissa, joten erotus täytyy tehdä matalissa lämpötiloissa. Yksi keino tähän on ohutfilmihaihdutin. Tämän työn tarkoituksena oli mallintaa veden haihdutusta veden ja ionisen nesteen seoksesta ohutfilmihaihduttimessa Aspen-Plus ohjelmalla. Haihduttimen tarkka mallinnus on tärkeää kierrätysprosessin suunnittelemiseksi ja optimoinniksi. Työssä myös selvitettiin, olisiko monivaihelauhdutus mahdollista. Erilaisia malllinnusvaihtoehtoja käsiteltiin ja panostislaukseen pohjautuva malli valittiin keskittymispohjaksi. Aspen Plus malli kehitettiin panostislausteorian pohjalta, ja sen tuloksia verrattiin aiemmin kehitettyyn flash-malliin sekä kokeellisiin tuloksiin. Panostislausmallin tulokset olivat lähempänä kokeellisia, kuin flash-malli. Kummastakin mallista kuitenkin puuttuu ionisen nesteen hydrolyysituote, mikä tuo epätarkkuutta mallinnukseen. Sen sisältäminen mallinnukseen tulisi olla seuraavien tutkimusten kohde. Panostislausmallille tehtiin tapaustutkimus ja monivaihelauhdutuksen sisällyttämisen mahdollisuutta haihdutusprosessiin arvioitiin. Kiehumispisteen kohoama vähäisissä vesipitoisuuksissa on nopeaa, mikä vaikeuttaa monivaihelauhdutuksen käyttämistä. Oikeilla paineilla ja lämpötiloilla se saatiin kuitenkin sisällytettyä, jos viimeisen haihduttimen lämmittämiseen käytettiin ulkoista energiaa. Monivaihelauhdutus säästi selvästi lämmitysenergiaa sekä auttoi kierrätystä jakamalla höyryn suureen virtaan erittäin puhdasta vesihöyryä ja pienempään virtaan, jossa lähes kaikki höyrystynyt ioninen neste oli

Adiabatic quasi-static CMOS

Mak Wing-sum.Thesis (M.Phil.)--Chinese University of Hong Kong, 2000.Includes bibliographical references (leaf [68]).Abstracts in English and Chinese.List of Figures --- p.IList of Tables --- p.IIIACKNOWLEDGMENTSABSTRACTChapter Chapter I --- IntroductionChapter 1.1 --- Introduction - Low Power --- p.I-1Chapter 1.2 --- Power Consumption in cmos Circuit --- p.I-1Chapter 1.2.1 --- Static Power Dissipation --- p.I-2Chapter 1.2.2 --- Dynamic Power Dissipation --- p.I-5Chapter 1.2.3 --- Short Circuit Power Dissipation --- p.I-8Chapter 1.3 --- Total Power Consumption of a CMOS Circuit --- p.I-10Chapter 1.4 --- Objective of the Project --- p.I-10Chapter CHAPTER II --- Background : Low Power Electronic - Adiabatic LogicChapter 2.1 --- Low Power Design --- p.II-12Chapter 2.2 --- Adiabatic Switching --- p.II-12Chapter 2.3 --- Adiabatic Logic --- p.II-14Chapter 2.4 --- History of Adiabatic Logic --- p.II-17Chapter CHAPTER III --- Adiabatic Quasi-Static CMOS InverterChapter 3.1 --- Building Block of AqsCMOS Logic --- p.III -18Chapter 3.2.1 --- AqsCMOS Inverter --- p.III -20Chapter 3.2.2 --- Diodes of AqsCMOS Inverter --- p.III -22Chapter 3.3 --- Pipeline Clocking of AqsCMOS Inverter Chain --- p.III -23Chapter Chapter IV --- Power Clock GeneratorChapter 4.1 --- Inductor - Capacitor Oscillator --- p.IV -24Chapter 4.2 --- Power Clock GeneratorChapter 4.2.1 --- Structure of Power Clock Generator --- p.IVChapter 4.2.2 --- power Consumption of Power Clock Generator --- p.IV -27Chapter Chapter V --- Adiabatic QuasI-Static CMOS MultiplierChapter 5.1 --- Baugh - Wooley Multiplier --- p.V-32Chapter 5.2 --- Structure of Multiplier --- p.V-34Chapter Chapter VI --- SimulationsChapter 6.1 --- AqsCMOS InverterChapter 6.1.1 --- Logic Alignment of AqsCMOS Inverter --- p.VI -38Chapter 6.1.2 --- Practical Implementation of AqsCMOS Inverter --- p.VI -39Chapter 6.1.3 --- Pipeline Clocking of AqsCMOS Inverter Chain --- p.VIChapter 6.2 --- Power Clock Generator --- p.VI -42Chapter 6.3 --- AqsCMOS Pipeline Multiplier --- p.VI -45Chapter 6.3.1 --- power estimation of multiplier --- p.VI -46Chapter ChapterVII --- evaluationsChapter 7.1 --- Testing Modules of AqsCMOS Inverter Chain --- p.VII -51Chapter 7.2 --- Evaluation of AqsCMOS Multiplier Testing ModulusChapter 7.2.1 --- Multiplier Chips Implementation --- p.VII -54Chapter 7.2.2 --- AQSCMOS Vs CMOS MULTIPLIER --- p.VII -55Chapter 7.2.3 --- Input Current Measurement --- p.VII -58Chapter 7.3 --- Power Measurement --- p.VII -63Chapter Chapter VIII --- Conclusions and Fiirthfr DevelopmentsChapter 8.1 --- Conclusions --- p.VIII -65Chapter 8.1.1 --- AqsCMOS Inverter --- p.VIII -65Chapter 8.1.2 --- Power Clock Generator --- p.VIII -65Chapter 8.1.3 --- AQSCMOS MULTIPLIER --- p.VIII -66Chapter 8.2 --- Further Development --- p.VIII -66Appendix I micro-photography of aqscmos multiplierAppendix II micro-Photography of CMOS multiplierAppendix III micro-photography of AqsCMOS inverter chain testing modulesAppendix IV power - meter simulation approachAppendix V Measurement Setting of AqsCMOS & CMOS MultipliersReferenc

Analysis and implementation of gasification processes in combined cycle

Throughout this paper the synthesis of gas from coal as feedstock for combined cycle is explained from different points of view. A complete and detailed explanation of the reactions involving gasification and further implementation of the process into combined cycle is given along the document. In between, an analysis about the state-of-art in which the technology is enclosed at this moment is shown to describe the characteristics of IGCC all around the world. To continue, an exhaustive breakdown of Puertollano’s IGCC power plant is done to clarify concepts into a practical framework. An idea emerges from this power station due to the closure to which has been forced. This premise is to recycle some of the devices concerning gasification that operated at Puertollano in order to hybridize them into another combined cycle, reducing investment and fuel costs. To see if this process is suitable, thermal and economic viability analyses are performed. Finally some possible improvements are stated with the results obtained.Ingeniería Mecánic

Artificial Brownian motors: Controlling transport on the nanoscale

In systems possessing spatial or dynamical symmetry breaking, Brownian motion combined with symmetric external input signals, deterministic or random, alike, can assist directed motion of particles at the submicron scales. In such cases, one speaks of "Brownian motors". In this review the constructive role of Brownian motion is exemplified for various one-dimensional setups, mostly inspired by the cell molecular machinery: working principles and characteristics of stylized devices are discussed to show how fluctuations, either thermal or extrinsic, can be used to control diffusive particle transport. Recent experimental demonstrations of this concept are reviewed with particular attention to transport in artificial nanopores and optical traps, where single particle currents have been first measured. Much emphasis is given to two- and three-dimensional devices containing many interacting particles of one or more species; for this class of artificial motors, noise rectification results also from the interplay of particle Brownian motion and geometric constraints. Recently, selective control and optimization of the transport of interacting colloidal particles and magnetic vortices have been successfully achieved, thus leading to the new generation of microfluidic and superconducting devices presented hereby. Another area with promising potential for realization of artificial Brownian motors are microfluidic or granular set-ups.....Comment: 57 pages, 39 figures; submitted to Reviews Modern Physics, revised versio