16 research outputs found

    A superconducting-nanowire 3-terminal electronic device

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    In existing superconducting electronic systems, Josephson junctions play a central role in processing and transmitting small-amplitude electrical signals. However, Josephson-junction-based devices have a number of limitations including: (1) sensitivity to magnetic fields, (2) limited gain, (3) inability to drive large impedances, and (4) difficulty in controlling the junction critical current (which depends sensitively on sub-Angstrom-scale thickness variation of the tunneling barrier). Here we present a nanowire-based superconducting electronic device, which we call the nanocryotron (nTron), that does not rely on Josephson junctions and can be patterned from a single thin film of superconducting material with conventional electron-beam lithography. The nTron is a 3-terminal, T-shaped planar device with a gain of ~20 that is capable of driving impedances of more than 100 k{\Omega}, and operates in typical ambient magnetic fields at temperatures of 4.2K. The device uses a localized, Joule-heated hotspot formed in the gate to modulate current flow in a perpendicular superconducting channel. We have characterized the nTron, matched it to a theoretical framework, and applied it both as a digital logic element in a half-adder circuit, and as a digital amplifier for superconducting nanowire single-photon detectors pulses. The nTron has immediate applications in classical and quantum communications, photon sensing and astronomy, and its performance characteristics make it compatible with existing superconducting technologies. Furthermore, because the hotspot effect occurs in all known superconductors, we expect the design to be extensible to other materials, providing a path to digital logic, switching, and amplification in high-temperature superconductors

    Spaceborne memory organization Interim report

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    Associative memory applications in unmanned space vehicle

    Spaceborne memory organization, phase 1 Final report

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    Application of associative memories to data processing for future space vehicle

    Superconducting Heater Cryotron-Based Reconfigurable Logic Towards Cryogenic IC Camouflaging

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    Superconducting electronics are among the most promising alternatives to conventional CMOS technology thanks to the ultra-fast speed and ultra-high energy efficiency of the superconducting devices. Having a cryogenic control processor is also a crucial requirement for scaling the existing quantum computers up to thousands of qubits. Despite showing outstanding speed and energy efficiency, Josephson junction-based circuits suffer from several challenges such as flux trapping leading to limited scalability, difficulty in driving high impedances, and so on. Three-terminal cryotron devices have been proposed to solve these issues which can drive high impedances (>100 k{\Omega}) and are free from any flux trapping issue. In this work, we develop a reconfigurable logic circuit using a heater cryotron (hTron). In conventional approaches, the number of devices to perform a logic operation typically increases with the number of inputs. However, here, we demonstrate a single hTron device-based logic circuit that can be reconfigured to perform 1-input copy and NOT, 2-input AND and OR, and 3-input majority logic operations by choosing suitable biasing conditions. Consequently, we can perform any processing task with a much smaller number of devices. Also, since we can perform different logic operations with the same circuit (same layout), we can develop a camouflaged system where all the logic gates will have the same layout. Therefore, this proposed circuit will ensure enhanced hardware security against reverse engineering attacks.Comment: 12 pages, 5 figure

    Microelectronic elements applied to the design of digital computer

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    Call number: LD2668 .R4 1967 P3

    Roving vehicle motion control Quarterly report, 1 Mar. - 31 May 1967

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    System and subsystem requirements for remote control of roving space vehicle motio

    Satellite on-board processing for earth resources data

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    Results of a survey of earth resources user applications and their data requirements, earth resources multispectral scanner sensor technology, and preprocessing algorithms for correcting the sensor outputs and for data bulk reduction are presented along with a candidate data format. Computational requirements required to implement the data analysis algorithms are included along with a review of computer architectures and organizations. Computer architectures capable of handling the algorithm computational requirements are suggested and the environmental effects of an on-board processor discussed. By relating performance parameters to the system requirements of each of the user requirements the feasibility of on-board processing is determined for each user. A tradeoff analysis is performed to determine the sensitivity of results to each of the system parameters. Significant results and conclusions are discussed, and recommendations are presented
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