Information Switching Processor (ISP) contention analysis and control

Future satellite communications, as a viable means of communications and an alternative to terrestrial networks, demand flexibility and low end-user cost. On-board switching/processing satellites potentially provide these features, allowing flexible interconnection among multiple spot beams, direct to the user communications services using very small aperture terminals (VSAT's), independent uplink and downlink access/transmission system designs optimized to user's traffic requirements, efficient TDM downlink transmission, and better link performance. A flexible switching system on the satellite in conjunction with low-cost user terminals will likely benefit future satellite network users

Mems (Micro-Electro-Mechanical-Systems) Based Microfluidic Platforms for Magnetic Cell Separation

Microfluidic platforms for magnetic cell separation were developed and investigated for isolation of magnetic particles and magnetically tagged cells from a fluidic sample. Two types of magnetic separation platforms were considered: an Isodynamic Open Gradient Magnetic Sorter (OGMS) and a multistage bio-ferrograph. Miniaturized magnets were designed using magnetostatic simulation software, microfluidic channels were fabricated using microfabrication technology and magnetic separation was investigated using video microscopy and digital image processing. The isodynamic OGMS consisted of an external magnetic circuit and a microfabricated channel (biochip) with embedded magnetic elements. The biochip is placed inside the magnetic field of the external circuit to obtain nearly constant energy density gradient in the portion of the channel used for separation. The microfabrication process involved improving adhesion of thick SU-8 to Pyrex, forming enclosed channels using a low temperature SU-8 adhesive bonding, and fabricating patterned plating molds on both sides of the bonded wafers. Adhesion of SU-8 to Pyrex was improved by using a highly crosslinked thin SU-8 adhesion layer, and enclosed microchannels were fabricated using selectively exposed SU-8 bond formation layers. Electroplating molds were fabricated using KMPR photoresists and were integrated on both sides of the bonded wafers. The multistage bio-ferrograph consisted of a microfabricated enclosed channel placed on the surface of a multi-unit magnet (4 trapezoidal magnets placed in series) assembly such that magnetic cells from a flowing stream would be deposited on designated locations. The OGMS was able to deflect magnetic particles by 500-1000 microns and the capture efficiencies of magnetic particles and cells with the multistage bio-ferrograph were 80-85 percent and 99.5 percent, respectivel

Mems (Micro-Electro-Mechanical-Systems) Based Microfluidic Platforms for Magnetic Cell Separation

Microfluidic platforms for magnetic cell separation were developed and investigated for isolation of magnetic particles and magnetically tagged cells from a fluidic sample. Two types of magnetic separation platforms were considered: an Isodynamic Open Gradient Magnetic Sorter (OGMS) and a multistage bio-ferrograph. Miniaturized magnets were designed using magnetostatic simulation software, microfluidic channels were fabricated using microfabrication technology and magnetic separation was investigated using video microscopy and digital image processing. The isodynamic OGMS consisted of an external magnetic circuit and a microfabricated channel (biochip) with embedded magnetic elements. The biochip is placed inside the magnetic field of the external circuit to obtain nearly constant energy density gradient in the portion of the channel used for separation. The microfabrication process involved improving adhesion of thick SU-8 to Pyrex, forming enclosed channels using a low temperature SU-8 adhesive bonding, and fabricating patterned plating molds on both sides of the bonded wafers. Adhesion of SU-8 to Pyrex was improved by using a highly crosslinked thin SU-8 adhesion layer, and enclosed microchannels were fabricated using selectively exposed SU-8 bond formation layers. Electroplating molds were fabricated using KMPR photoresists and were integrated on both sides of the bonded wafers. The multistage bio-ferrograph consisted of a microfabricated enclosed channel placed on the surface of a multi-unit magnet (4 trapezoidal magnets placed in series) assembly such that magnetic cells from a flowing stream would be deposited on designated locations. The OGMS was able to deflect magnetic particles by 500-1000 microns and the capture efficiencies of magnetic particles and cells with the multistage bio-ferrograph were 80-85 percent and 99.5 percent, respectivel

On-board B-ISDN fast packet switching architectures. Phase 2: Development. Proof-of-concept architecture definition report

For the next-generation packet switched communications satellite system with onboard processing and spot-beam operation, a reliable onboard fast packet switch is essential to route packets from different uplink beams to different downlink beams. The rapid emergence of point-to-point services such as video distribution, and the large demand for video conference, distributed data processing, and network management makes the multicast function essential to a fast packet switch (FPS). The satellite's inherent broadcast features gives the satellite network an advantage over the terrestrial network in providing multicast services. This report evaluates alternate multicast FPS architectures for onboard baseband switching applications and selects a candidate for subsequent breadboard development. Architecture evaluation and selection will be based on the study performed in phase 1, 'Onboard B-ISDN Fast Packet Switching Architectures', and other switch architectures which have become commercially available as large scale integration (LSI) devices

An Architecture for distributed multimedia database systems

In the past few years considerable demand for user oriented multimedia information systems has developed. These systems must provide a rich set of functionality so that new, complex, and interesting applications can be addressed. This places considerable importance on the management of diverse data types including text, images, audio and video. These requirements generate the need for a new generation of distributed heterogeneous multimedia database systems. In this paper we identify a set of functional requirements for a multimedia server considering database management, object synchronization and integration, and multimedia query processing. A generalization of the requirements to a distributed system is presented, and some of our current research and developing activities are discussed

Architectural Considerations for Photonic Switching Networks

Photonic technologies are reviewed that could become important components of future telecommunication systems. Photonic devices and systems are divided into two classes according to the function they perform. The first class, relational, refers to devices, that map the input channels to the output channels under external control. The second class, logic, perform some type or combination of Boolean logic functions. Some of the strengths and weaknesses of operating in the photonic domain are presented. Relational devices and their applications are discussed. Optical logic devices and their potential applications are reviewed

A taxonomy of parallel sorting

TR 84-601In this paper, we propose a taxonomy of parallel sorting that includes a broad range of array and file sorting algorithms. We analyze the evolution of research on parallel sorting, from the earliest sorting networks to the shared memory algorithms and the VLSI sorters. In the context of sorting networks, we describe two fundamental parallel merging schemes - the odd-even and the bitonic merge. Sorting algorithms have been derived from these merging algorithms for parallel computers where processors communicate through interconnection networks such as the perfect shuffle, the mesh and a number of other sparse networks. After describing the network sorting algorithms, we show that, with a shared memory model of parallel computation, faster algorithms have been derived from parallel enumeration sorting schemes, where keys are first ranked and then rearranged according to their rank

On-board B-ISDN fast packet switching architectures. Phase 1: Study

The broadband integrate services digital network (B-ISDN) is an emerging telecommunications technology that will meet most of the telecommunications networking needs in the mid-1990's to early next century. The satellite-based system is well positioned for providing B-ISDN service with its inherent capabilities of point-to-multipoint and broadcast transmission, virtually unlimited connectivity between any two points within a beam coverage, short deployment time of communications facility, flexible and dynamic reallocation of space segment capacity, and distance insensitive cost. On-board processing satellites, particularly in a multiple spot beam environment, will provide enhanced connectivity, better performance, optimized access and transmission link design, and lower user service cost. The following are described: the user and network aspects of broadband services; the current development status in broadband services; various satellite network architectures including system design issues; and various fast packet switch architectures and their detail designs

Three Highly Parallel Computer Architectures and Their Suitability for Three Representative Artificial Intelligence Problems

Virtually all current Artificial Intelligence (AI) applications are designed to run on sequential (von Neumann) computer architectures. As a result, current systems do not scale up. As knowledge is added to these systems, a point is reached where their performance quickly degrades. The performance of a von Neumann machine is limited by the bandwidth between memory and processor (the von Neumann bottleneck). The bottleneck is avoided by distributing the processing power across the memory of the computer. In this scheme the memory becomes the processor (a smart memory ). This paper highlights the relationship between three representative AI application domains, namely knowledge representation, rule-based expert systems, and vision, and their parallel hardware realizations. Three machines, covering a wide range of fundamental properties of parallel processors, namely module granularity, concurrency control, and communication geometry, are reviewed: the Connection Machine (a fine-grained SIMD hypercube), DADO (a medium-grained MIMD/SIMD/MSIMD tree-machine), and the Butterfly (a coarse-grained MIMD Butterflyswitch machine)

Switching techniques for broadband ISDN

The properties of switching techniques suitable for use in broadband networks have been investigated. Methods for evaluating the performance of such switches have been reviewed. A notation has been introduced to describe a class of binary self-routing networks. Hence a technique has been developed for determining the nature of the equivalence between two networks drawn from this class. The necessary and sufficient condition for two packets not to collide in a binary self-routing network has been obtained. This has been used to prove the non-blocking property of the Batcher-banyan switch. A condition for a three-stage network with channel grouping and link speed-up to be nonblocking has been obtained, of which previous conditions are special cases. A new three-stage switch architecture has been proposed, based upon a novel cell-level algorithm for path allocation in the intermediate stage of the switch. The algorithm is suited to hardware implementation using parallelism to achieve a very short execution time. An array of processors is required to implement the algorithm The processor has been shown to be of simple design. It must be initialised with a count representing the number of cells requesting a given output module. A fast method has been described for performing the request counting using a non-blocking binary self-routing network. Hardware is also required to forward routing tags from the processors to the appropriate data cells, when they have been allocated a path through the intermediate stage. A method of distributing these routing tags by means of a non-blocking copy network has been presented. The performance of the new path allocation algorithm has been determined by simulation. The rate of cell loss can increase substantially in a three-stage switch when the output modules are non-uniformly loaded. It has been shown that the appropriate use of channel grouping in the intermediate stage of the switch can reduce the effect of non-uniform loading on performance