A New Chase-type Soft-decision Decoding Algorithm for Reed-Solomon Codes

This paper addresses three relevant issues arising in designing Chase-type algorithms for Reed-Solomon codes: 1) how to choose the set of testing patterns; 2) given the set of testing patterns, what is the optimal testing order in the sense that the most-likely codeword is expected to appear earlier; and 3) how to identify the most-likely codeword. A new Chase-type soft-decision decoding algorithm is proposed, referred to as tree-based Chase-type algorithm. The proposed algorithm takes the set of all vectors as the set of testing patterns, and hence definitely delivers the most-likely codeword provided that the computational resources are allowed. All the testing patterns are arranged in an ordered rooted tree according to the likelihood bounds of the possibly generated codewords. While performing the algorithm, the ordered rooted tree is constructed progressively by adding at most two leafs at each trial. The ordered tree naturally induces a sufficient condition for the most-likely codeword. That is, whenever the proposed algorithm exits before a preset maximum number of trials is reached, the output codeword must be the most-likely one. When the proposed algorithm is combined with Guruswami-Sudan (GS) algorithm, each trial can be implement in an extremely simple way by removing one old point and interpolating one new point. Simulation results show that the proposed algorithm performs better than the recently proposed Chase-type algorithm by Bellorado et al with less trials given that the maximum number of trials is the same. Also proposed are simulation-based performance bounds on the MLD algorithm, which are utilized to illustrate the near-optimality of the proposed algorithm in the high SNR region. In addition, the proposed algorithm admits decoding with a likelihood threshold, that searches the most-likely codeword within an Euclidean sphere rather than a Hamming sphere

Multi-Trial Guruswami–Sudan Decoding for Generalised Reed–Solomon Codes

An iterated refinement procedure for the Guruswami--Sudan list decoding algorithm for Generalised Reed--Solomon codes based on Alekhnovich's module minimisation is proposed. The method is parametrisable and allows variants of the usual list decoding approach. In particular, finding the list of \emph{closest} codewords within an intermediate radius can be performed with improved average-case complexity while retaining the worst-case complexity.Comment: WCC 2013 International Workshop on Coding and Cryptography (2013

PARALLEL SUBSPACE SUBCODES OF REED-SOLOMON CODES FOR MAGNETIC RECORDING CHANNELS

Read channel architectures based on a single low-density parity-check (LDPC) code are being considered for the next generation of hard disk drives. However, LDPC-only solutions suffer from the error floor problem, which may compromise reliability, if not handled properly. Concatenated architectures using an LDPC code plus a Reed-Solomon (RS) code lower the error-floor at high signal-to-noise ratio (SNR) at the price of a reduced coding gain and a less sharp waterfall region at lower SNR. This architecture fails to deal with the error floor problem when the number of errors caused by multiple dominant trapping sets is beyond the error correction capability of the outer RS code. The ultimate goal of a sharper waterfall at the low SNR region and a lower error floor at high SNR can be approached by introducing a parallel subspace subcode RS (SSRS) code (PSSRS) to replace the conventional RS code. In this new LDPC+PSSRS system, the PSSRS code can help localize and partially destroy the most dominant trapping sets. With the proposed iterative parallel local decoding algorithm, the LDPC decoder can correct the remaining errors by itself. The contributions of this work are: 1) We propose a PSSRS code with parallel local SSRS structure and a three-level decoding architecture, which enables a trade off between performance and complexity; 2) We propose a new LDPC+PSSRS system with a new iterative parallel local decoding algorithm with a 0.5dB+ gain over the conventional two-level system. Its performance for 4K-byte sectors is close to the multiple LDPC-only architectures for perpendicular magneticxviiirecording channels; 3) We develop a new decoding concept that changes the major role of the RS code from error correcting to a "partial" trapping set destroyer

Error-Correction Coding and Decoding: Bounds, Codes, Decoders, Analysis and Applications

Coding; Communications; Engineering; Networks; Information Theory; Algorithm

Design, optimization and Real Time implementation of a new Embedded Chien Search Block for Reed-Solomon (RS) and Bose-Chaudhuri-Hocquenghem (BCH) codes on FPGA Board

The development of error correcting codes has been a major concern for communications systems. Therefore, RS and BCH (Reed-Solomon and Bose, Ray-Chaudhuri and Hocquenghem) are effective methods to improve the quality of digital transmission. In this paper a new algorithm of Chien Search block for embedded systems is proposed. This algorithm is based on a factorization of error locator polynomial. i.e, we can minimize an important number of logic gates and hardware resources using the FPGA card. Consequently, it reduces the power consumption with a percentage which can reach 40 % compared to the basic RS and BCH decoder. The proposed system is designed, simulated using the hardware description language (HDL) and Quartus development software. Also, the performance of the designed embedded Chien search block for decoder RS\BCH (255, 239) has been successfully verified by implementation on FPGA board