A 0.18 μm CMOS low noise, highly linear continuous-time seventh-order elliptic low-pass filter

This paper presents a fast procedure for the system-level evaluation of noise and distortion in continuous-time integrated filters. The presented approach is based on Volterra's series theory and matrix algebra manipulation. This procedure has been integrated in a constrained optimization routine to improve the dynamic range of the filter while keeping the area and power consumption at a minimum. The proposed approach is demonstrated with the design, from system- to physical-level, of a seventh-order low-pass continuous-time elliptic filter for a high-performance broadband power-line communication receiver. The filter shows a nominal cut-off frequency of fc = 34MHz, less than 1dB ripple in the pass-band, and a maximum stop-band rejection of 65dB. Additionally, the filter features 12dB programmable boost in the pass-band to counteract high frequency components attenuation. Taking into account its wideband transfer characteristic, the filter has been implemented using G m-C techniques. The basic building block of its structure, the transconductor, uses a source degeneration topology with local feedback for linearity improving and shows a worst-case intermodulation distortion of -70 dB for two tones close to the passband edge, separated by 1MHz, with 70mV of amplitude. The filter combines very low noise (peak root spectral noise density below 56nV/√Hz) and high linearity (more than 64dB of MTPR for a DMT signal of 0.5Vpp amplitude) properties. The filter has been designed in a 0.18μm CMOS technology and it is compliant with industrial operation conditions (-40 to 85°C temperature variation and ±5% power supply deviation). The filter occupies 13mm2 and exhibits a typical power consumption of 450 mW from a 1.8V voltage supply.Ministerio de Ciencia y Tecnología TIC2003-0235

Optimal robust fault detection

This dissertation gives complete, analytic, and optimal solutions to several robust fault detection problems for both continuous and discrete linear systems that have been considered in the research community in the last twenty years. It is shown that several well-recognized robust fault detection problems, such as H_minus\H_2, H_2\ H_infinity and H_infinity\H_infinity problems, have a very simple optimal solution in an observer form by solving a standard algebraic Riccati equation. The optimal solutions to some other robust fault detection problems, such as H_minus\H_2 and H_2\H_2 problems are also given. In addition, it is shown that some well-studied and seeming sensible optimization criteria for fault detection filter design could lead to (optimal but) useless fault detection filter designs

CMOS design of chaotic oscillators using state variables: a monolithic Chua's circuit

This paper presents design considerations for monolithic implementation of piecewise-linear (PWL) dynamic systems in CMOS technology. Starting from a review of available CMOS circuit primitives and their respective merits and drawbacks, the paper proposes a synthesis approach for PWL dynamic systems, based on state-variable methods, and identifies the associated analog operators. The GmC approach, combining quasi-linear VCCS's, PWL VCCS's, and capacitors is then explored regarding the implementation of these operators. CMOS basic building blocks for the realization of the quasi-linear VCCS's and PWL VCCS's are presented and applied to design a Chua's circuit IC. The influence of GmC parasitics on the performance of dynamic PWL systems is illustrated through this example. Measured chaotic attractors from a Chua's circuit prototype are given. The prototype has been fabricated in a 2.4- mu m double-poly n-well CMOS technology, and occupies 0.35 mm/sup 2/, with a power consumption of 1.6 mW for a +or-2.5-V symmetric supply. Measurements show bifurcation toward a double-scroll Chua's attractor by changing a bias current

Realization of Integrable Low- Voltage Companding Filters for Portable System Applications

Undoubtedly, today’s integrated electronic systems owe their remarkable performance primarily to the rapid advancements of digital technology since 1970s. The various important advantages of digital circuits are: its abstraction from the physical details of the actual circuit implementation, its comparative insensitiveness to variations in the manufacturing process, and the operating conditions besides allowing functional complexity that would not be possible using analog technology. As a result, digital circuits usually offer a more robust behaviour than their analog counterparts, though often with area, power and speed drawbacks. Due to these and other benefits, analog functionality has increasingly been replaced by digital implementations. In spite of the advantages discussed above, analog components are far from obsolete and continue to be key components of modern electronic systems. There is a definite trend toward persistent and ubiquitous use of analog electronic circuits in day-to-day life. Portable electronic gadgets, wireless communications and the widespread application of RF tags are just a few examples of contemporary developments. While all of these electronic systems are based on digital circuitry, they heavily rely on analog components as interfaces to the real world. In fact, many modern designs combine powerful digital systems and complementary analog components on a single chip for cost and reliability reasons. Unfortunately, the design of such systems-on-chip (SOC) suffers from the vastly different design styles of analog and digital components. While mature synthesis tools are readily available for digital designs, there is hardly any such support for analog designers apart from wellestablished PSPICE-like circuit simulators. Consequently, though the analog part usually occupies only a small fraction of the entire die area of an SOC, but its design often constitutes a major bottleneck within the entire development process. Integrated continuous-time active filters are the class of continuous-time or analog circuits which are used in various applications like channel selection in radios, anti-aliasing before sampling, and hearing aids etc. One of the figures of merit of a filter is the dynamic range; this is the ratio of the largest to the smallest signal that can be applied at the input of the filter while maintaining certain specified performance. The dynamic range required in the filter varies with the application and is decided by the variation in strength of the desired signal as well as that of unwanted signals that are to be rejected by the filter. It is well known that the power dissipation and the capacitor area of an integrated active filter increases in proportion to its dynamic range. This situation is incompatible with the needs of integrated systems, especially battery operated ones. In addition to this fundamental dependence of power dissipation on dynamic range, the design of integrated active filters is further complicated by the reduction of supply voltage of integrated circuits imposed by the scaling down of technologies to attain twin objective of higher speed and lower power consumption in digital circuits. The reduction in power consumption with decreasing supply voltage does not apply to analog circuits. In fact, considerable innovation is required with a reduced supply voltage even to avoid increasing power consumption for a given signal to noise ratio (S/N). These aspects pose a great hurdle to the active filter designer. A technique which has attracted the attention of circuit designers as a possible route to filters with higher dynamic range per unit power consumption is “companding”. Companding (compression-expansion) filters are a very promising subclass of continuous-time analog filters, where the input (linear) signal is initially compressed before it will be handled by the core (non-linear) system. In order to preserve the linear operation of the whole system, the non-linear signal produced by the core system is converted back to a linear output signal by employing an appropriate output stage. The required compression and expansion operations are performed by employing bipolar transistors in active region or MOS transistors in weak inversion; the systems thus derived are known as logarithmic-domain (logdomain) systems. In case MOS transistors operated in saturation region are employed, the derived structures are known as Square-root domain systems. Finally, the third class of companding filters can also be obtained by employing bipolar transistors in active region or MOS transistors in weak inversion; the derived systems are known as Sinh-domain systems. During the last several years, a significant research effort has been already carried out in the area of companding circuits. This is due to the fact that their main advantages are the capability for operation in low-voltage environment and large dynamic range originated from their companding nature, electronic tunability of the frequency characteristics, absence of resistors and the potential for operations in varied frequency regions.Thus, it is obvious that companding filters can be employed for implementing high-performance analog signal processing in diverse frequency ranges. For example, companding filters could be used for realizing subsystems in: xDSL modems, disk drive read channels, biomedical electronics, Bluetooth/ZigBee applications, phaselocked loops, FM stereo demodulator, touch-tone telephone tone decoder and crossover network used in a three-way high-fidelity loudspeaker etc. A number of design methods for companding filters and their building blocks have been introduced in the literature. Most of the proposed filter structures operate either above 1.5V or under symmetrical (1.5V) power supplies. According to data that provides information about the near future of semiconductor technology, International Technology Roadmap for Semiconductors (ITRS), in 2013, the supply voltage of digital circuits in 32 nm technology will be 0.5 V. Therefore, the trend for the implementation of analog integrated circuits is the usage of low-voltage building blocks that use a single 0.5-1.5V power supply. Therefore, the present investigation was primarily concerned with the study and design of low voltage and low power Companding filters. The work includes the study about: the building blocks required in implementing low voltage and low power Companding filters; the techniques used to realize low voltage and low power Companding filters and their various areas of application. Various novel low voltage and low power Companding filter designs have been developed and studied for their characteristics to be applied in a particular portable area of application. The developed designs include the N-th order universal Companding filter designs, which have been reported first time in the open literature. Further, an endeavor has been made to design Companding filters with orthogonal tuning of performance parameters so that the designs can be simultaneously used for various features. The salient features of each of the developed circuit are described. Electronic tunability is one of the major features of all of the designs. Use of grounded capacitors and resistorless designs in all the cases makes the designs suitable for IC technology. All the designs operate in a low-voltage and low-power environment essential for portable system applications. Unless specified otherwise, all the investigations on these designs are based on the PSPICE simulations using model parameters of the NR100N bipolar transistors and BSIM 0.35μm/TSMC 0.25μm /TSMC 0.18μm CMOS process MOS transistors. The performance of each circuit has been validated by comparing the characteristics obtained using simulation with the results present in the open literature. The proposed designs could not be realized in silicon due to non-availability of foundry facility at the place of study. An effort has already been started to realize some of the designs in silicon and check their applicability in practical circuits. At the basic level, one of the proposed Companding filter designs was implemented using the commercially available transistor array ICs (LM3046N) and was found to verify the theoretical predictions obtained from the simulation results

Construction of Parseval wavelets from redundant filter systems

We consider wavelets in L^2(R^d) which have generalized multiresolutions. This means that the initial resolution subspace V_0 in L^2(R^d) is not singly generated. As a result, the representation of the integer lattice Z^d restricted to V_0 has a nontrivial multiplicity function. We show how the corresponding analysis and synthesis for these wavelets can be understood in terms of unitary-matrix-valued functions on a torus acting on a certain vector bundle. Specifically, we show how the wavelet functions on R^d can be constructed directly from the generalized wavelet filters.Comment: 34 pages, AMS-LaTeX ("amsproc" document class) v2 changes minor typos in Sections 1 and 4, v3 adds a number of references on GMRA theory and wavelet multiplicity analysis; v4 adds material on pages 2, 3, 5 and 10, and two more reference

Stability and Stabilization of the Wave Model.

The stability properties of 2-D systems are an important aspect of the design of acoustic, seismic, image and sonar signal processors. This research utilizes the Wave model format to transport 1-D stability techniques to the 2-D setting. The research studies stability through multistep growth bounds on the Wave state. The use of Lyapunov theory is also considered. The research considers also the problem of stabilizing a 2-D system using state and/or output information feedback to interior and/or boundary controls. Finally the problem of observer design for 2-D systems is considered, with the new stability criteria being used to assure observer/system convergence. New results based on symmetrizability are also discussed. The principal results are illustrated by a number of examples. The results are also interpreted in the context of other contemporary local state models

An investigation of potential applications of OP-SAPS: Operational Sampled Analog Processors

The application of OP-SAP's (operational sampled analog processors) in pattern recognition system is summarized. Areas investigated include: (1) human face recognition; (2) a high-speed programmable transversal filter system; (3) discrete word (speech) recognition; and (4) a resolution enhancement system

Selection of sampling rate for digital control of aircrafts

The considerations in selecting the sample rates for digital control of aircrafts are identified and evaluated using the optimal discrete method. A high performance aircraft model which includes a bending mode and wind gusts was studied. The following factors which influence the selection of the sampling rates were identified: (1) the time and roughness response to control inputs; (2) the response to external disturbances; and (3) the sensitivity to variations of parameters. It was found that the time response to a control input and the response to external disturbances limit the selection of the sampling rate. The optimal discrete regulator, the steady state Kalman filter, and the mean response to external disturbances are calculated

Contributions to impedance shaping control techniques for power electronic converters

El conformado de la impedancia o admitancia mediante control para convertidores electrónicos de potencia permite alcanzar entre otros objetivos: mejora de la robustez de los controles diseñados, amortiguación de la dinámica de la tensión en caso de cambios de carga, y optimización del filtro de red y del controlador en un solo paso (co-diseño). La conformación de la impedancia debe ir siempre acompañada de un buen seguimiento de referencias. Por tanto, la idea principal es diseñar controladores con una estructura sencilla que equilibren la consecución de los objetivos marcados en cada caso. Este diseño se realiza mediante técnicas modernas, cuya resolución (síntesis del controlador) requiere de herramientas de optimización. La principal ventaja de estas técnicas sobre las clásicas, es decir, las basadas en soluciones algebraicas, es su capacidad para tratar problemas de control complejos (plantas de alto orden y/o varios objetivos) de una forma considerablemente sistemática. El primer problema de control por conformación de la impedancia consiste en reducir el sobreimpulso de tensión ante cambios de carga y minimizar el tamaño de los componentes del filtro pasivo en los convertidores DC-DC. Posteriormente, se diseñan controladores de corriente y tensión para un inversor DC-AC trifásico que logren una estabilidad robusta del sistema para una amplia variedad de filtros. La condición de estabilidad robusta menos conservadora, siendo la impedancia de la red la principal fuente de incertidumbre, es el índice de pasividad. En el caso de los controladores de corriente, el impacto de los lazos superiores en la estabilidad basada en la impedancia también se analiza mediante un índice adicional: máximo valor singular. Cada uno de los índices se aplica a un rango de frecuencias determinado. Finalmente, estas condiciones se incluyen en el diseño en un solo paso del controlador de un convertidor back-to-back utilizado para operar generadores de inducción doblemente alimentados (aerogeneradores tipo 3) presentes en algunos parques eólicos. Esta solución evita los problemas de oscilación subsíncrona, derivados de las líneas de transmisión con condensadores de compensación en serie, a los que se enfrentan estos parques eólicos. Los resultados de simulación y experimentales demuestran la eficacia y versatilidad de la propuesta.Impedance or admittance shaping by control for power electronic converters allows to achieve among other objectives: robustness enhancement of the designed controls, damped voltage dynamics in case of load changes, and grid filter and controller optimization in a single step (co-design). Impedance shaping must always be accompanied by a correct reference tracking performance. Therefore, the main idea is to design controllers with a simple structure that balance the achievement of the objectives set in each case. This design is carried out using modern techniques, whose resolution (controller synthesis) requires optimization tools. The main advantage of these techniques over the classical ones, i.e. those based on algebraic solutions, is their ability to deal with complex control problems (high order plants and/or several objectives) in a considerably systematic way. The first impedance shaping control problem is to reduce voltage overshoot under load changes and minimize the size of passive filter components in DC-DC converters. Subsequently, current and voltage controllers for a three-phase DC-AC inverter are designed to achieve robust system stability for a wide variety of filters. The least conservative robust stability condition, with grid impedance being the main source of uncertainty, is the passivity index. In the case of current controllers, the impact of higher loops on impedance-based stability is also analyzed by an additional index: maximum singular value. Each of the indices is applied to a given frequency range. Finally, these conditions are included in the one-step design of the controller of a back-to-back converter used to operate doubly fed induction generators (type-3 wind turbines) present in some wind farms. This solution avoids the sub-synchronous oscillation problems, derived from transmission lines with series compensation capacitors, faced by these wind farms. Simulation and experimental results demonstrate the effectiveness and versatility of the proposa