Fault Tolerance in Reversible Logic Circuits and Quantum Cost Optimization

Energy dissipation is a prominent factor for the very large scale integrated circuit (VLSI). The reversible logic-based circuit was capable to compute the logic without energy dissipation. Accordingly, reversible circuits are an emerging domain of research based on the low value of energy dissipation. At nano-level design, the critical factor in the logic computing paradigm is the fault. The proposed methodology of fault coverage is powerful for testability. In this article, we target three factors such as fault tolerance, fault coverage and fault detection in the reversible KMD Gates. Our analysis provides good evidence that the minimum test vector covers the 100 % fault coverage and 50 % fault tolerance in KMD Gate. Further, we show a comparison between the quantum equivalent and controlled V and V+ gate in all the types of KMD Gates. The proposed methodology mentions that after controlled V and V+ gate based ALU, divider and Vedic multiplier have a significant reduction in quantum cost. The comparative results of designs such as Vedic multiplier, division unit and ALU are obtained and they are analyzed showing significant improvement in quantum cost

Limits on Fundamental Limits to Computation

An indispensable part of our lives, computing has also become essential to industries and governments. Steady improvements in computer hardware have been supported by periodic doubling of transistor densities in integrated circuits over the last fifty years. Such Moore scaling now requires increasingly heroic efforts, stimulating research in alternative hardware and stirring controversy. To help evaluate emerging technologies and enrich our understanding of integrated-circuit scaling, we review fundamental limits to computation: in manufacturing, energy, physical space, design and verification effort, and algorithms. To outline what is achievable in principle and in practice, we recall how some limits were circumvented, compare loose and tight limits. We also point out that engineering difficulties encountered by emerging technologies may indicate yet-unknown limits.Comment: 15 pages, 4 figures, 1 tabl

Thermal Characteristics and Safety Aspects of Lithium-Ion Batteries: An In-Depth Review

This paper provides an overview of the significance of precise thermal analysis in the context of lithium-ion battery systems. It underscores the requirement for additional research to create efficient methodologies for modeling and controlling thermal properties, with the ultimate goal of enhancing both the safety and performance of Li-ion batteries. The interaction between temperature regulation and lithium-ion batteries is pivotal due to the intrinsic heat generation within these energy storage systems. A profound understanding of the thermal behaviors exhibited by lithium-ion batteries, along with the implementation of advanced temperature control strategies for battery packs, remains a critical pursuit. Utilizing tailored models to dissect the thermal dynamics of lithium-ion batteries significantly enhances our comprehension of their thermal management across a wide range of operational scenarios. This comprehensive review systematically explores diverse research endeavors that employ simulations and models to unravel intricate thermal characteristics, behavioral nuances, and potential runaway incidents associated with lithium-ion batteries. The primary objective of this review is to underscore the effectiveness of employed characterization methodologies and emphasize the pivotal roles that key parameters—specifically, current rate and temperature—play in shaping thermal dynamics. Notably, the enhancement of thermal design systems is often more feasible than direct alterations to the lithium-ion battery designs themselves. As a result, this thermal review primarily focuses on the realm of thermal systems. The synthesized insights offer a panoramic overview of research findings, with a deeper understanding requiring consultation of specific published studies and their corresponding modeling endeavors

Build Testbenches for Verification in Shift Register ICs using SystemVerilog

A testbench is built to verify a functionality of a shift register IC (Integrated Circuit) from stuck-at-faults, stuck-at-1 as well as stuck-at-0. The testbench is supported by components, i.e., generator, interface, driver, monitor, scoreboard, environment, test, and testbench top. The IC consists of sequential logic circuits of D-type flip-flops. The faults may occur at interconnects between the circuits inside the IC. In order to examine the functionality from the faults, both the testbench and the IC are designed using SystemVerilog and simulated using Questasim simulator. Simulation results show the faults may be detected by the testbench. Moreover, the detected faults may be indicated by error statements in transcript results of the simulato

Real-Time Fault Diagnosis of Permanent Magnet Synchronous Motor and Drive System

Permanent Magnet Synchronous Motors (PMSMs) have gained massive popularity in industrial applications such as electric vehicles, robotic systems, and offshore industries due to their merits of efficiency, power density, and controllability. PMSMs working in such applications are constantly exposed to electrical, thermal, and mechanical stresses, resulting in different faults such as electrical, mechanical, and magnetic faults. These faults may lead to efficiency reduction, excessive heat, and even catastrophic system breakdown if not diagnosed in time. Therefore, developing methods for real-time condition monitoring and detection of faults at early stages can substantially lower maintenance costs, downtime of the system, and productivity loss. In this dissertation, condition monitoring and detection of the three most common faults in PMSMs and drive systems, namely inter-turn short circuit, demagnetization, and sensor faults are studied. First, modeling and detection of inter-turn short circuit fault is investigated by proposing one FEM-based model, and one analytical model. In these two models, efforts are made to extract either fault indicators or adjustments for being used in combination with more complex detection methods. Subsequently, a systematic fault diagnosis of PMSM and drive system containing multiple faults based on structural analysis is presented. After implementing structural analysis and obtaining the redundant part of the PMSM and drive system, several sequential residuals are designed and implemented based on the fault terms that appear in each of the redundant sets to detect and isolate the studied faults which are applied at different time intervals. Finally, real-time detection of faults in PMSMs and drive systems by using a powerful statistical signal-processing detector such as generalized likelihood ratio test is investigated. By using generalized likelihood ratio test, a threshold was obtained based on choosing the probability of a false alarm and the probability of detection for each detector based on which decision was made to indicate the presence of the studied faults. To improve the detection and recovery delay time, a recursive cumulative GLRT with an adaptive threshold algorithm is implemented. As a result, a more processed fault indicator is achieved by this recursive algorithm that is compared to an arbitrary threshold, and a decision is made in real-time performance. The experimental results show that the statistical detector is able to efficiently detect all the unexpected faults in the presence of unknown noise and without experiencing any false alarm, proving the effectiveness of this diagnostic approach.publishedVersio