Energy challenges for ICT

The energy consumption from the expanding use of information and communications technology (ICT) is unsustainable with present drivers, and it will impact heavily on the future climate change. However, ICT devices have the potential to contribute signi - cantly to the reduction of CO2 emission and enhance resource e ciency in other sectors, e.g., transportation (through intelligent transportation and advanced driver assistance systems and self-driving vehicles), heating (through smart building control), and manu- facturing (through digital automation based on smart autonomous sensors). To address the energy sustainability of ICT and capture the full potential of ICT in resource e - ciency, a multidisciplinary ICT-energy community needs to be brought together cover- ing devices, microarchitectures, ultra large-scale integration (ULSI), high-performance computing (HPC), energy harvesting, energy storage, system design, embedded sys- tems, e cient electronics, static analysis, and computation. In this chapter, we introduce challenges and opportunities in this emerging eld and a common framework to strive towards energy-sustainable ICT

Late Innovation Strategies in Asian Electronics Industries: A Conceptual Framework and Illustrative Evidence

This paper was published in Oxford Development Studies special issue in honor of the late Professor Linsu Kim. The paper reviews evidence on the evolution of electronics design in Asia's leading electronics exporting countries, to establish what capabilities have been developed, and to shed light on the forces that are driving "late innovation" strategies. It also reviews intellectual sources that can be used to theoretically ground these hypotheses. Using a well-known taxonomy of innovation that distinguishes incremental, modular, architectural and radical innovations, and the concept of "disruptive technologies", I argue that Asian firms may have realistic chances to engage in incremental innovations as well as in architectural innovations. However, to sustain "late innovation" strategies over a longer period, "complex system integration" capabilities are necessary to provide the missing link.

Seven strategies for tolerating highly defective fabrication

In this article we present an architecture that supports fine-grained sparing and resource matching. The base logic structure is a set of interconnected PLAs. The PLAs and their interconnections consist of large arrays of interchangeable nanowires, which serve as programmable product and sum terms and as programmable interconnect links. Each nanowire can have several defective programmable junctions. We can test nanowires for functionality and use only the subset that provides appropriate conductivity and electrical characteristics. We then perform a matching between nanowire junction programmability and application logic needs to use almost all the nanowires even though most of them have defective junctions. We employ seven high-level strategies to achieve this level of defect tolerance

Internationalisation of Innovation: Why Chip Design Moving to Asia

This paper will appear in International Journal of Innovation Management, special issue in honor of Keith Pavitt, (Peter Augsdoerfer, Jonathan Sapsed, and James Utterback, guest editors), forthcoming. Among Keith Pavitt's many contributions to the study of innovation is the proposition that physical proximity is advantageous for innovative activities that involve highly complex technological knowledge But chip design, a process that creates the greatest value in the electronics industry and that requires highly complex knowledge, is experiencing a massive dispersion to leading Asian electronics exporting countries. To explain why chip design is moving to Asia, the paper draws on interviews with 60 companies and 15 research institutions that are doing leading-edge chip design in Asia. I demonstrate that "pull" and "policy" factors explain what attracts design to particular locations. But to get to the root causes that shift the balance in favor of geographical decentralization, I examine "push" factors, i.e. changes in design methodology ("system-on-chip design") and organization ("vertical specialization" within global design networks). The resultant increase in knowledge mobility explains why chip design - that, in Pavitt's framework is not supposed to move - is moving from the traditional centers to a few new specialized design clusters in Asia. A completely revised and updated version has been published as: " Complexity and Internationalisation of Innovation: Why is Chip Design Moving to Asia?," in International Journal of Innovation Management, special issue in honour of Keith Pavitt, Vol. 9,1: 47-73.

Custom Integrated Circuits

Contains reports on ten research projects.Analog Devices, Inc.IBM CorporationNational Science Foundation/Defense Advanced Research Projects Agency Grant MIP 88-14612Analog Devices Career Development Assistant ProfessorshipU.S. Navy - Office of Naval Research Contract N0014-87-K-0825AT&TDigital Equipment CorporationNational Science Foundation Grant MIP 88-5876

The complex interaction between Global Production Networks, Digital Information Systems and International Knowledge Transfers

Traditionally many studies of knowledge in economics have focused on localized networks and intra-regional collaborations. However, the rising frequency by which firms collaborate within the context of global networks of production and innovation, the increasingly intricate divisions of labor involved and the extensive use of the Internet to facilitate interaction are all relatively novel trends that underline the importance of knowledge creation and flows across different locations. Focusing on this topic, the present chapter examines the complex interactions between global production networks (GPN), digital information systems (DIS) and knowledge transfers in information technology industries. It seeks to disentangle the various conduits through which different kinds of knowledge are transferred within such networks, and investigate how recent generations of DIS are affecting those knowledge transfers. The paper concludes that the dual expansion of GPN and DIS is adding new complexity to the practice of innovation: To access knowledge necessary for sustained creativity firms often have to link up with remote partners in GPN, but to be able to absorb and utilize this knowledge, they also frequently have to engage in local interactive learning processes. These local- global linkages - and the various skills necessary to operate them - are strongly interdependent, mutually reinforcing and critical for the development and maintenance of innovation-based competitiveness.

Nonvolatile CMOS memristor, reconfigurable array and its application in power load forecasting

© 2023 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. This is the accepted manuscript version of a conference paper which has been published in final form at https://doi.org/10.1109/TII.2023.3341256The high cost, low yield, and low stability of nano-materials significantly hinder the application and development of memristors. To promote the application of memristors, researchers proposed a variety of memristor emulators to simulate memristor functions and apply them in various fields. However these emulators lack nonvolatile characteristics, limiting their scope of application. This paper proposes an innovative nonvolatile memristor circuit based on complementary metal-oxide-semiconductor (CMOS) technology, expanding the horizons of memristor emulators. The proposed memristor is fabricated in a reconfigurable array architecture using the standard CMOS process, allowing the connection between memristors to be altered by configuring the on-off state of switches. Compared to nano-material memristors, the CMOS nonvolatile memristor circuit proposed in this paper offers advantages of low manufacturing cost and easy mass production, which can promote the application of memristors. The application of the reconfigurable array is further studied by constructing an Echo State Network (ESN) for short-term load forecasting in the power system.Peer reviewe

Fuse: A technique to anticipate failures due to degradation in ALUs

This paper proposes the fuse, a technique to anticipate failures due to degradation in any ALU (arithmetic logic unit), and particularly in an adder. The fuse consists of a replica of the weakest transistor in the adder and the circuitry required to measure its degradation. By mimicking the behavior of the replicated transistor the fuse anticipates the failure short before the first failure in the adder appears, and hence, data corruption and program crashes can be avoided. Our results show that the fuse anticipates the failure in more than 99.9% of the cases after 96.6% of the lifetime, even for pessimistic random within-die variations.Peer ReviewedPostprint (published version

The Value of Power in China: How Do Party Membership and Social Networks Affect Pay in Different Ownership Sectors?

Party membership and social networks, as two forms of nonmarket power, have significant effects on personal income. Do the effects vary across different ownership sectors (suoyouzhi xingzhi)? Using a nationally representative survey of urban households (China Household Income Project surveys in 1995 and 2002), we find that (1) party membership can significantly increase personal income, but this effect does not significantly differ between different ownership sectors or between the years 1995 and 2002 and (2) social networks are insignificant in State-Owned Enterprises (SOEs), while they contribute significantly to personal income in non-SOE sectors.Income, Party membership, Social networks, Ownership, Maketization