Digital Triplet Approach for Real-Time Monitoring and Control of an Elevator Security System

As Digital Twins gain more traction and their adoption in industry increases, there is a need to integrate such technology with machine learning features to enhance functionality and enable decision making tasks. This has lead to the emergence of a concept known as Digital Triplet; an enhancement of Digital Twin technology through the addition of an ’intelligent activity layer’. This is a relatively new technology in Industrie 4.0 and research efforts are geared towards exploring its applicability, development and testing of means for implementation and quick adoption. This paper presents the design and implementation of a Digital Triplet for a three-floor elevator system. It demonstrates the integration of a machine learning (ML) object detection model and the system Digital Twin. This was done to introduce an additional security feature that enabled the system to make a decision, based on objects detected and take preliminary security measures. The virtual model was designed in Siemens NX and programmed via Total Integrated Automation (TIA) portal software. The corresponding physical model was fabricated and controlled using a Programmable Logic Controller (PLC) S7 1200. A control program was developed to mimic the general operations of a typical elevator system used in a commercial building setting. Communication, between the physical and virtual models, was enabled using the OPC-Unified Architecture (OPC-UA) protocol. Object recognition using “You only look once” (YOLOV3) based machine learning algorithm was incorporated. The Digital Triplet’s functionality was tested, ensuring the virtual system duplicated actual operations of the physical counterpart through the use of sensor data. Performance testing was done to determine the impact of the ML module on the real-time functionality aspect of the system. Experiment results showed the object recognition contributed an average of 1.083s to an overall signal travel time of 1.338 s

Meeting the design challenges of nano-CMOS electronics: an introduction to an upcoming EPSRC pilot project

The years of ‘happy scaling’ are over and the fundamental challenges that the semiconductor industry faces, at both technology and device level, will impinge deeply upon the design of future integrated circuits and systems. This paper provides an introduction to these challenges and gives an overview of the Grid infrastructure that will be developed as part of a recently funded EPSRC pilot project to address them, and we hope, which will revolutionise the electronics design industry

On Regularity and Integrated DFM Metrics

Transistor geometries are well into the nanometer regime, keeping with Moore's Law. With this scaling in geometry, problems not significant in the larger geometries have come to the fore. These problems, collectively termed variability, stem from second-order effects due to the small geometries themselves and engineering limitations in creating the small geometries. The engineering obstacles have a few solutions which are yet to be widely adopted due to cost limitations in deploying them. Addressing and mitigating variability due to second-order effects comes largely under the purview of device engineers and to a smaller extent, design practices. Passive layout measures that ease these manufacturing limitations by regularizing the different layout pitches have been explored in the past. However, the question of the best design practice to combat systematic variations is still open. In this work we explore considerations for the regular layout of the exclusive-OR gate, the half-adder and full-adder cells implemented with varying degrees of regularity. Tradeoffs like complete interconnect unidirectionality, and the inevitable introduction of vias are qualitatively analyzed and some factors affecting the analysis are presented. Finally, results from the Calibre Critical Feature Analysis (CFA) of the cells are used to evaluate the qualitative analysis

Incident Analysis & Digital Forensics in SCADA and Industrial Control Systems

SCADA and industrial control systems have been traditionally isolated in physically protected environments. However, developments such as standardisation of data exchange protocols and increased use of IP, emerging wireless sensor networks and machine-to-machine communication mean that in the near future related threat vectors will require consideration too outside the scope of traditional SCADA security and incident response. In the light of the significance of SCADA for the resilience of critical infrastructures and the related targeted incidents against them (e.g. the development of stuxnet), cyber security and digital forensics emerge as priority areas. In this paper we focus on the latter, exploring the current capability of SCADA operators to analyse security incidents and develop situational awareness based on a robust digital evidence perspective. We look at the logging capabilities of a typical SCADA architecture and the analytical techniques and investigative tools that may help develop forensic readiness to the level of the current threat environment requirements. We also provide recommendations for data capture and retention

Control strategies for a powertrain with hydromechanical transmission

open2noThis paper deals with the management of an engine equipped with a continuous hydro-mechanical transmission. The traditional minimum fuel consumption control strategy requires the control system to keep the engine along the minimum fuel consumption line. However, this strategy may not be the best one, since the performance of the powertrain depends on both engine efficiency and transmission efficiency. Therefore, a methodology was developed in order to extend the minimum fuel consumption control strategy for the engine to the engine-transmission set, that is, to the whole powertrain. To achieve this goal, the case of an urban bus equipped with a dual-stage hydromechanical transmission was studied. The vehicle's powertrain model was first used to derive the family of minimum consumption curves for the powertrain; subsequently to simulate the behavior of the vehicle. The comparison between the minimum consumption criterion for the engine and the minimum consumption criterion for the powertrain shows a slight advantage of the latter.openRossetti, Antonio; Macor, Alarico*Rossetti, Antonio; Macor, Alaric

Computation lithography: Virtual reality and virtual virtuality

Computation lithography is enabled by a combination of physical understanding, mathematical abstraction, and implementation simplification. An application in the virtual world of computation lithography can be a virtual reality or a virtual virtuality depending on its engineering sensible-ness and technical feasibility. Examples under consideration include design-for- manufacturability and inverse lithography. © 2009 Optical Society of America.postprin

Utilizing industry 4.0 on the construction site : challenges and opportunities

In recent years a step change has been seen in the rate of adoption of Industry 4.0 technologies by manufacturers and industrial organisations alike. This paper discusses the current state of the art in the adoption of industry 4.0 technologies within the construction industry. Increasing complexity in onsite construction projects coupled with the need for higher productivity is leading to increased interest in the potential use of industry 4.0 technologies. This paper discusses the relevance of the following key industry 4.0 technologies to construction: data analytics and artificial intelligence; robotics and automation; buildings information management; sensors and wearables; digital twin and industrial connectivity. Industrial connectivity is a key aspect as it ensures that all Industry 4.0 technologies are interconnected allowing the full benefits to be realized. This paper also presents a research agenda for the adoption of Industry 4.0 technologies within the construction sector; a three-phase use of intelligent assets from the point of manufacture up to after build and a four staged R&D process for the implementation of smart wearables in a digital enhanced construction site

Impact of RET on physical layouts

In this paper, we briefly describe the lithography developments known as RET (Resolution Enhancement Technologies), which include off-axis illumination in litho tools, Optical and Process Correction (OPC), and phase shifting masks (PSM). All of these techniques are adopted to allow ever smaller features to be reliably manufactured, and are being generally adopted in all manufacturing below 0.25 microns. However, their adoption also places certain restrictions on layouts. We explore these restrictions, and then provide suggestions for layout practices that will facilitate the use of these technologies, especially the generation of a clean “target ” layout for use as input layers for photomask preparation, and the use of verification tools that use process simulation