Adaptive Nonlinear RF Cancellation for Improved Isolation in Simultaneous Transmit-Receive Systems

This paper proposes an active radio frequency (RF) cancellation solution to suppress the transmitter (TX) passband leakage signal in radio transceivers supporting simultaneous transmission and reception. The proposed technique is based on creating an opposite-phase baseband equivalent replica of the TX leakage signal in the transceiver digital front-end through adaptive nonlinear filtering of the known transmit data, to facilitate highly accurate cancellation under a nonlinear TX power amplifier (PA). The active RF cancellation is then accomplished by employing an auxiliary transmitter chain, to generate the actual RF cancellation signal, and combining it with the received signal at the receiver (RX) low noise amplifier (LNA) input. A closed-loop parameter learning approach, based on the decorrelation principle, is also developed to efficiently estimate the coefficients of the nonlinear cancellation filter in the presence of a nonlinear TX PA with memory, finite passive isolation, and a nonlinear RX LNA. The performance of the proposed cancellation technique is evaluated through comprehensive RF measurements adopting commercial LTE-Advanced transceiver hardware components. The results show that the proposed technique can provide an additional suppression of up to 54 dB for the TX passband leakage signal at the RX LNA input, even at considerably high transmit power levels and with wide transmission bandwidths. Such novel cancellation solution can therefore substantially improve the TX-RX isolation, hence reducing the requirements on passive isolation and RF component linearity, as well as increasing the efficiency and flexibility of the RF spectrum use in the emerging 5G radio networks.Comment: accepted to IEE

Performance of fractional delay estimation in joint estimation algorithm dedicated to digital Tx leakage compensation in FDD transceivers

International audienceThis paper deals with the performance of the fractional delay estimator in the joint complex amplitude / delay estimation algorithm dedicated to digital Tx leakage compensation in FDD transceivers. Such transceivers are affected from transmitter-receiver signal leakage. Combined with non linearity of components in the received path, it leads to a pollution in the baseband signal. The baseband polluting term depends on the equivalent Tx leakage channel, modeling leakages and the received path. We have proposed in [7, 8] a joint estimation of the complex gain and the fractional delay and derived asymptotic performance of the complex gain estimator, that showed the necessity of the fractional delay estimation. In this paper, we propose a comprehensive study of the fractional delay estimation algorithm and its analytic performance. The study is based on the analysis of the S-curve and loop noise variance of the timing error detector, from which an approximation of the asymptotic performance of the joint estimation algorithm is derived

Four-element phased-array beamformers and a self-interference canceling full-duplex transciver in 130-nm SiGe for 5G applications at 26 GHz

This thesis is on the design of radio-frequency (RF) integrated front-end circuits for next generation 5G communication systems. The demand for higher data rates and lower latency in 5G networks can only be met using several new technologies including, but not limited to, mm-waves, massive-MIMO, and full-duplex. Use of mm-waves provides more bandwidth that is necessary for high data rates at the cost of increased attenuation in air. Massive-MIMO arrays are required to compensate for this increased path loss by providing beam steering and array gain. Furthermore, full duplex operation is desirable for improved spectrum efficiency and reduced latency. The difficulty of full duplex operation is the self-interference (SI) between transmit (TX) and receive (RX) paths. Conventional methods to suppress this interference utilize either bulky circulators, isolators, couplers or two separate antennas. These methods are not suitable for fully-integrated full-duplex massive-MIMO arrays. This thesis presents circuit and system level solutions to the issues summarized above, in the form of SiGe integrated circuits for 5G applications at 26 GHz. First, a full-duplex RF front-end architecture is proposed that is scalable to massive-MIMO arrays. It is based on blind, RF self-interference cancellation that is applicable to single/shared antenna front-ends. A high resolution RF vector modulator is developed, which is the key building block that empowers the full-duplex frontend architecture by achieving better than state-of-the-art 10-b monotonic phase control. This vector modulator is combined with linear-in-dB variable gain amplifiers and attenuators to realize a precision self-interference cancellation circuitry. Further, adaptive control of this SI canceler is made possible by including an on-chip low-power IQ downconverter. It correlates copies of transmitted and received signals and provides baseband/dc outputs that can be used to adaptively control the SI canceler. The solution comes at the cost of minimal additional circuitry, yet significantly eases linearity requirements of critical receiver blocks at RF/IF such as mixers and ADCs. Second, to complement the proposed full-duplex front-end architecture and to provide a more complete solution, high-performance beamformer ICs with 5-/6- b phase and 3-/4-b amplitude control capabilities are designed. Single-channel, separate transmitter and receiver beamformers are implemented targeting massive- MIMO mode of operation, and their four-channel versions are developed for phasedarray communication systems. Better than state-of-the-art noise performance is obtained in the RX beamformer channel, with a full-channel noise figure of 3.3 d

Modeling and Digital Mitigation of Transmitter Imperfections in Radio Communication Systems

To satisfy the continuously growing demands for higher data rates, modern radio communication systems employ larger bandwidths and more complex waveforms. Furthermore, radio devices are expected to support a rich mixture of standards such as cellular networks, wireless local-area networks, wireless personal area networks, positioning and navigation systems, etc. In general, a "smart'' device should be flexible to support all these requirements while being portable, cheap, and energy efficient. These seemingly conflicting expectations impose stringent radio frequency (RF) design challenges which, in turn, call for their proper understanding as well as developing cost-effective solutions to address them. The direct-conversion transceiver architecture is an appealing analog front-end for flexible and multi-standard radio systems. However, it is sensitive to various circuit impairments, and modern communication systems based on multi-carrier waveforms such as Orthogonal Frequency Division Multiplexing (OFDM) and Orthogonal Frequency Division Multiple Access (OFDMA) are particularly vulnerable to RF front-end non-idealities.This thesis addresses the modeling and digital mitigation of selected transmitter (TX) RF impairments in radio communication devices. The contributions can be divided into two areas. First, new modeling and digital mitigation techniques are proposed for two essential front-end impairments in direct-conversion architecture-based OFDM and OFDMA systems, namely inphase and quadrature phase (I/Q) imbalance and carrier frequency offset (CFO). Both joint and de-coupled estimation and compensation schemes for frequency-selective TX I/Q imbalance and channel distortions are proposed for OFDM systems, to be adopted on the receiver side. Then, in the context of uplink OFDMA and Single Carrier FDMA (SC-FDMA), which are the air interface technologies of the 3rd Generation Partnership Project (3GPP) Long Term Evolution (LTE) and LTE-Advanced systems, joint estimation and equalization techniques of RF impairments and channel distortions are proposed. Here, the challenging multi-user uplink scenario with unequal received power levels is investigated where I/Q imbalance causes inter-user interference. A joint mirror subcarrier processing-based minimum mean-square error (MMSE) equalizer with an arbitrary number of receiver antennas is formulated to effectively handle the mirror sub-band users of different power levels. Furthermore, the joint channel and impairments filter responses are efficiently approximated with polynomial-based basis function models, and the parameters of basis functions are estimated with the reference signals conforming to the LTE uplink sub-frame structure. The resulting receiver concept adopting the proposed techniques enables improved link performance without modifying the design of RF transceivers.Second, digital baseband mitigation solutions are developed for the TX leakage signal-induced self-interference in frequency division duplex (FDD) transceivers. In FDD transceivers, a duplexer is used to connect the TX and receiver (RX) chains to a common antenna while also providing isolation to the receiver chain against the powerful transmit signal. In general, the continuous miniaturization of hardware and adoption of larger bandwidths through carrier aggregation type noncontiguous allocations complicates achieving sufficient TX-RX isolation. Here, two different effects of the transmitter leakage signal are investigated. The first is TX out-of-band (OOB) emissions and TX spurious emissions at own receiver band, due to the transmitter nonlinearity, and the second is nonlinearity of down-converter in the RX that generates second-order intermodulation distortion (IMD2) due to the TX in-band leakage signal. This work shows that the transmitter leakage signal-induced interference depends on an equivalent leakage channel that models the TX path non-idealities, duplexer filter responses, and the RX path non-idealities. The work proposes algorithms that operate in the digital baseband of the transceiver to estimate the TX-RX non-idealities and the duplexer filter responses, and subsequently regenerating and canceling the self-interference, thereby potentially relaxing the TX-RX isolation requirements as well as increasing the transceiver flexibility.Overall, this thesis provides useful signal models to understand the implications of different RF non-idealities and proposes compensation solutions to cope with certain RF impairments. This is complemented with extensive computer simulations and practical RF measurements to validate their application in real-world radio transceivers

Wideband Tx Leakage Cancellation using Adaptive Delay Filter at RF Frequencies

Transmitter leakage is caused by limited isolation between Tx and Rx paths of an frequency-division duplexing (FDD) transceiver due to use of non-ideal duplexers. As the leakage can seriously impair the performance of the receiver, it is important to increase the isolation of the existing system. A portion of the leakage falling into the Rx band can't be removed using conventional band-pass techniques, which leads to exploration of active cancellation methods. This paper presents an active Tx leakage cancellation structure with adaptive delay filter, together with a related design method- ology. Based on S-parameters characterisation of a SAW duplexer, simulation results show that for 20 MHz bandwidth more than 25 dB cancellation can be achieved, for LTE band 8 carrier. The complexity of proposed cancellation structure is proportional to the characteristics of a duplexer used in the transceiver. Using finite number of elements, the number of auxiliary paths needed depends on how complex the characteristics of the duplexer are within the band of interest

High-speed Time-interleaved Digital-to-Analog Converter (TI-DAC) for Self-Interference Cancellation Applications

Nowadays, the need for higher data-rate is constantly growing to enhance the quality of the daily communication services. The full-duplex (FD) communication is exemplary method doubling the data-rate compared to half-duplex one. However, part of the strong output signal of the transmitter interferes to the receiver-side because they share the same antenna with limited attenuation and, as a result, the receiver’s performance is corrupted. Hence, it is critical to remove the leakage signal from the receiver’s path by designing another block called self-interference cancellation (SIC). The main goal of this dissertation is to develop the SIC block embedded in the current-mode FD receivers. To this end, the regenerated cancellation current signal is fed to the inputs of the base-band filter and after the mixer of a (direct-conversion) current-mode FD receiver. Since the pattern of the transmitter (the digital signal generated by DSP) is known, a high-speed digital-to-Analog converter (DAC) with medium-resolution can perfectly suppress main part of the leakage on the receiver path. A capacitive DAC (CDAC) is chosen among the available solutions because it is compatible with advanced CMOS technology for high-speed application and the medium-resolution designs. Although the main application of the design is to perform the cancellation, it can also be employed as a stand-alone DAC in the Analog (I/Q) transmitter. The SIC circuitry includes a trans-impedance amplifier (TIA), two DACs, high-speed digital circuits, and built-in-self-test section (BIST). According to the available specification for full-duplex communication system, the resolution and working frequency of the CDAC are calculated (designed) equal to 10-bit (3 binary+ 2 binary + 5 thermometric) and 1GHz, respectively. In order to relax the design of the TIA (settling time of the DAC), the CDAC implements using 2-way time-interleaved (TI) manner (the effective SIC frequency equals 2GHz) without using any calibration technique. The CDAC is also developed with the split-capacitor technique to lower the negative effects of the conventional binary-weighted DAC. By adding one extra capacitor on the left-side of the split-capacitor, LSB-side, the value of the split-capacitor can be chosen as an integer value of the unit capacitor. As a result, it largely enhances the linearity of the CADC and cancellation performance. If the block works as a stand-alone DAC with non-TI mode, the digital input code representing a Sinus waveform with an amplitude 1dB less than full-scale and output frequency around 10.74MHz, chosen by coherent sampling rule, then the ENOB, SINAD, SFDR, and output signal are 9.4-bit, 58.2 dB, 68.4dBc, and -9dBV. The simulated value of the |DNL| (static linearity) is also less than 0.7. The similar simulation was done in the SIC mode while the capacitive-array woks in the TI mode and cancellation current is set to the full-scale. Hence, the amount of cancelling the SI signal at the output of the TIA, SNDR, SFDR, SNDRequ. equals 51.3dB, 15.1 dB, 24dBc, 66.4 dB. The designed SIC cannot work as a closed-loop design. The layout was optimally drawn in order to minimize non-linearity, the power-consumption of the decoders, and reduce the complexity of the DAC. By distributing the thermometric cells across the array and using symmetrical switching scheme, the DAC is less subjected to the linear and gradient effect of the oxide. Based on the post-layout simulation results, the deviation of the design after drawing the layout is studied. To compare the results of the schematic and post-layout designs, the exact conditions of simulation above (schematic simulations) are used. When the block works as a stand-alone CDAC, the ENOB, SINAD, SFDR are 8.5-bit, 52.6 dB, 61.3 dBc. The simulated value of the |DNL| (static linearity) is also limited to 1.3. Likewise, the SI signal at the output of the TIA, SNDR, SFDR, SNDRequ. are equal to 44dB, 11.7 dB, 19 dBc, 55.7 dB