Advanced signal processing techniques for the modeling and linearization of wireless communication systems.

Los nuevos estándares de comunicaciones digitales inalámbricas están impulsando el diseño de amplificadores de potencia con unas condiciones límites en términos de linealidad y eficiencia. Si bien estos nuevos sistemas exigen que los dispositivos activos trabajen cerca de la zona de saturación en busca de la eficiencia energética, la no linealidad inherente puede producir que el sistema muestre prestaciones inadecuadas en emisiones fuera de banda y distorsión en banda. La necesidad de técnicas digitales de compensación y la evolución en el diseño de nuevas arquitecturas de procesamiento de señales digitales posicionan a la predistorsión digital (DPD) como un enfoque práctico. Los predistorsionadores digitales se suelen basar en modelos de comportamiento como el memory polynomial (MP), el generalized memory polynomial (GMP) y el dynamic deviation reduction-based (DDR), etc. Los modelos de Volterra sufren la llamada "maldición de la dimensionalidad", ya que su complejidad tiende a crecer de forma exponencial a medida que el orden y la profundidad de memoria crecen. Esta tesis se centra principalmente en contribuir a la rama de conocimiento que enmarca el modelado y linealización de sistemas de comunicación inalámbrica. Los principales temas tratados son el modelo Volterra-Parafac y el modelo general de Volterra para sistemas complejos, los cuales tratan la estructura del DPD y las series de Volterra estructuradas con compressed-sensing y un método para la linealización en un rango de potencias de operación, que se centran en cómo los coeficientes de los modelos deben ser obtenidos.Premio Extraordinario de Doctorado U

High power amplifier pre-distorter based on neural-fuzzy systems for OFDM signals

In this paper, a novel High Power Amplifier (HPA) pre-distorter based on Adaptive Networks - Fuzzy Inference Systems (ANFIS) for Orthogonal Frequency Division Multiplexing (OFDM) signals is proposed and analyzed. Models of Traveling Wave Tube Amplifiers (TWTA) and Solid State Power Amplifiers (SSPA), both memoryless and with memory, have been used for evaluation of the proposed technique. After training, the ANFIS linearizes the HPA response and thus, the obtained signal is extremely similar to the original. An average Error Vector Magnitude (EVM) of 10-6 can be easily obtained with our proposal. As a consequence, the Bit Error Rate (BER) degradation is negligible showing a better performance than what can be achieved with other methods available in the literature. Moreover, the complexity of the proposed scheme is reducedThis work was supported in part by projectsMULTIADAPTIVE (TEC2008-06327-C03-02) and AECI Program of Research Cooperation with MoroccoPublicad

Novel Predistortion System for 4G/5G Small-Cell and Wideband Transmitters

To meet the growing demand for mobile data, various technologies are being introduced to wireless networks to increase system capacity. On one hand, large number of small-cell base stations are adopted to serve the reduced cell size; on the other hand, millimeter wave (mm-wave) systems with large antenna arrays that transmit ultra-wideband signals are expected in fifth generation (5G) networks. Power amplifiers (PAs), responsible for boosting the radio frequency (RF) signal power, are the most critical components in base station transmitters, and dominate the overall efficiency and linearity of the system. The design challenges to balance the contradictory requirements of efficiency and linearity of the PAs are usually addressed by linearization techniques, particularly the digital predistortion (DPD) system. However, existing DPD solutions face increasing difficulties keeping up with new developments in base station technologies. When considering sub-6 GHz small-cell base station transmitters, analog and RF predistortion techniques have recently received renewed attention due to their inherent low power nature. Their achievable linearization capacity is significantly limited, however, largely by their implementation complexity in realizing the needed predistortion models in analog circuitry. On the other hand, despite significant developments in DPD models for wideband signals, the implementations of such DPD models in practical hardware have received relatively little attention. Yet the conventional implementation of a DPD engine is limited by the maximum clock frequency of the digital circuitry employed and cannot be scaled to satisfy the growing bandwidth of transmitted signals for 5G networks. Furthermore, both analog and digital solutions require a transmitter-observation-receiver (TOR) to capture the PA outputs, necessitates the use of analog-to-digital converters (ADCs) whose complexity and power consumption increase with signal bandwidth. Such trend is not scalable for future base stations, and new innovations in feedback and training methods are required. This thesis presents a number of contributions to address the above identified challenges. To reduce the power overhead of the linearization system, a digitally-assisted analog-RF predistortion (DA-ARFPD) system that uses a novel predistortion model is introduced. The proposed finite-impulse-response assisted envelope memory polynomial (FIR-EMP) model allows for a reduction of hardware implementation complexity while maintaining good linearization capacity and low power overhead. A two-step small-signal-assisted parameter identification (SSAPI) algorithm is devised to estimate the parameters of the two main blocks of the FIR-EMP model, such that the training can be completed efficiently. A DA-ARFPD test bench has been built, which incorporates major RF components, to assess the validity of the proposed FIR-EMP scheme and the SSAPI algorithm. Measurement results show that the proposed FIR-EMP model with SSAPI algorithm can successfully linearize multiple PAs driven with various wideband and carrier-aggregated signals of up to 80~MHz modulation bandwidths for sub-6 GHz systems. Next, a hardware-efficient real-time DPD system with scalable linearization bandwidth for ultra-wideband 5G mm-wave transmitters is proposed. It uses a novel parallel-processing DPD engine architecture to process multiple samples per clock cycle, overcomes the linearization bandwidth limit imposed by the maximum clock rate of digital circuits used in conventional DPD implementation. Potentially unlimited linearization bandwidth could be achieved by using the proposed system with current digital circuit technologies. The linearization performance and bandwidth scalability of the proposed system is demonstrated experimentally using a silicon-based Doherty (DPA) with 400 MHz wideband signal operating at 28 GHz, and over-the-air measurements using a 64-element beamforming array with 800 MHz wideband signal, also at 28 GHz. The proposed DPD system achieves over 2.4 GHz linearization bandwidth using only a 300 MHz core clock for the digital circuits. Finally, to reduce the power consumption and cost of the TOR, a new approach to train the predistorter using under-sampled feedback signal is presented. Using aliased samples of the PA's output captured at either baseband or intermedia frequency (IF), the proposed algorithm is able to compute the coefficients of the predistortion engine to linearize the PA using a direct learning architecture. Experimentally, both the baseband and IF schemes achieve linearization performance comparable to a full-rate system. Implemented together with a parallel-processing based DPD engine on a field-programmable gate array (FPGA) based system-on-chip (SOC), the proposed feedback and training solution achieves over 2.4~GHz linearization bandwidth using an ADC operating at a clock rate of 200 MHz. Its performance is demonstrated experimentally by linearizing a silicon DPA with 200 MHz and 400 MHz signals in conductive measurements, and a 64-element beamforming array with 400 MHz and 800 MHz signals in over-the-air testing

Development of digital predistorters for broadband power amplifiers in OFDM systems using the simplicial canonical piecewise linear function

Power amplifiers (PAs) are inherently nonlinear devices. Linearity of a PA can be achieved by backing off the PA to its linear region at the expense of power efficiency loss. For signals with high envelope fluctuation such OFDM system, large backoff is required, causing significant loss in power efficiency. Thus, backoff is not a favourable solution. Digital predistorters (PDs) are widely employed for linearizing PAs that are driven to the nonlinear regions. In broadband systems where PAs exhibit memory effects, the PDs are also required to compensate the memory effects. This thesis deals with the development of digital PDs for broadband PAs in OFDM systems using the Simplicial Canonical Piecewise Linear (SCPWL) function. The SCPWL function offers a few advantages over polynomial models. It imposes a saturation after the last breakpoint, making it suitable for modelling nonlinearities of PA and PD. The breakpoints of the function can be freely placed to allow optimum fitting of a given nonlinearity. It is suitable for modeling strong nonlinearities. Analysis of the SCPWL spectra property shows that the function models infinite order of intermodulation distortion, even with small number of breakpoints. The accuracy of the model can be improved by increasing the number of breakpoints. The original real-valued SCPWL function is extended to include memory structure and complex-valued coefficients, resulting in the proposed baseband SCPWL model with memory. The model is adopted in the development of the Hammerstein-SCPWL PD and memory-SCPWL PD. Vector projection methods are developed for static SCPWL PDs identification. Adaptive algorithms employing the indirect and direct learning architectures are developed for identifying the Hammerstein-SCPWL PD and memory-SCPWL PD. By exploiting the properties of the SCPWL function, the algorithms are simplified. A modified Wiener model estimator is employed to circumvent the non-convex cost function problem of block models. This further reduces the complexity of the Hammerstein PD algorithms. The thesis also analyses the effects of measurement noise on indirect learning SCPWL filter. Due to its linear basis function, the SCPWL filter coefficients do not suffer the coefficient bias effects which are observed in polynomial models. The performance of the proposed SCPWL PDs are compared with state-of-the-art polynomial-based PDs by simulations and measurements