4,517 research outputs found

    BLOCK MOTION ESTIMATION USING DIRECTIONAL ADAPTIVE SEARCH WINDOW

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    Motion estimation (ME) is the exploitation of similarities between adjacent frames in a video sequence by eliminating temporal redundancy, and is an essential part of the H.264 and other video compression standards. However, it introduces an increase of computation complexity resulting in longer execution time. Thus, adaptive motion estimation for H.264 is proposed in order to reduce the execution time while giving better PSNR performance. The algorithm determines the amount of motion in each block and classifies them as low, medium and high motion. From the magnitude and direction of the x andy motion vector components, the search window (search range) is dynamically adjusted. For high motion, the search range is set to be the maximum value and vice versa. The results show that execution time could be reduced to almost half (50%) of the conventional method since the number of search points and computations decrease inthe range of40% to 60%. Furthermore, the method gives a better image quality for video sequence with uniform motion and negligible PSNR loss in others. By introducing early termination inthe adaptive motion estimation, the number of computation could be reduced even further since the search process is terminated immediately certain criteria are satisfied. By using Option 2 for early termination, the search point computation and PSNR is reduced with average 1.3% and 1.027% from the adaptive motion estimation without the early termination process

    Simulated Annealing for Fast Motion Estimation Algorithm in H.264/AVC

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    Motion estimation and CABAC VLSI co-processors for real-time high-quality H.264/AVC video coding

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    Real-time and high-quality video coding is gaining a wide interest in the research and industrial community for different applications. H.264/AVC, a recent standard for high performance video coding, can be successfully exploited in several scenarios including digital video broadcasting, high-definition TV and DVD-based systems, which require to sustain up to tens of Mbits/s. To that purpose this paper proposes optimized architectures for H.264/AVC most critical tasks, Motion estimation and context adaptive binary arithmetic coding. Post synthesis results on sub-micron CMOS standard-cells technologies show that the proposed architectures can actually process in real-time 720 Ă— 480 video sequences at 30 frames/s and grant more than 50 Mbits/s. The achieved circuit complexity and power consumption budgets are suitable for their integration in complex VLSI multimedia systems based either on AHB bus centric on-chip communication system or on novel Network-on-Chip (NoC) infrastructures for MPSoC (Multi-Processor System on Chip

    Efficient Motion Estimation and Mode Decision Algorithms for Advanced Video Coding

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    H.264/AVC video compression standard achieved significant improvements in coding efficiency, but the computational complexity of the H.264/AVC encoder is drastically high. The main complexity of encoder comes from variable block size motion estimation (ME) and rate-distortion optimized (RDO) mode decision methods. This dissertation proposes three different methods to reduce computation of motion estimation. Firstly, the computation of each distortion measure is reduced by proposing a novel two step edge based partial distortion search (TS-EPDS) algorithm. In this algorithm, the entire macroblock is divided into different sub-blocks and the calculation order of partial distortion is determined based on the edge strength of the sub-blocks. Secondly, we have developed an early termination algorithm that features an adaptive threshold based on the statistical characteristics of rate-distortion (RD) cost regarding current block and previously processed blocks and modes. Thirdly, this dissertation presents a novel adaptive search area selection method by utilizing the information of the previously computed motion vector differences (MVDs). In H.264/AVC intra coding, DC mode is used to predict regions with no unified direction and the predicted pixel values are same and thus smooth varying regions are not well de-correlated. This dissertation proposes an improved DC prediction (IDCP) mode based on the distance between the predicted and reference pixels. On the other hand, using the nine prediction modes in intra 4x4 and 8x8 block units needs a lot of overhead bits. In order to reduce the number of overhead bits, an intra mode bit rate reduction method is suggested. This dissertation also proposes an enhanced algorithm to estimate the most probable mode (MPM) of each block. The MPM is derived from the prediction mode direction of neighboring blocks which have different weights according to their positions. This dissertation also suggests a fast enhanced cost function for mode decision of intra encoder. The enhanced cost function uses sum of absolute Hadamard-transformed differences (SATD) and mean absolute deviation of the residual block to estimate distortion part of the cost function. A threshold based large coefficients count is also used for estimating the bit-rate part

    High Efficiency and Low Complexity Motion Estimation Algorithm for MPEG-4 AVC/H.264 Coding

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    [[abstract]]H.264/AVC has achieved significant rate-distortion efficiency by many useful video encoding and decoding tools, but the motion estimation process concerns greatly on computational complexity. In this work, we propose an efficient algorithm, Hierarchical Single Cross Search (HSCS), by using the precision initial search center and simple search strategy to finish the motion estimation. Experimental results indicate that the proposed method can obtain good performance. Through the proposed features, the coding performance can be improved significantly, and the computation complexity of the integer pixel motion estimation of H.264 is also decreased tremendously.[[incitationindex]]E
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