10,394 research outputs found

    CMOS mixed-signal MODEM for data transmission and control of electrical household appliances using the low-voltage power-line

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    This paper presents a CMOS 0.6ÎŒm mixed-signal MODEM ASIC for data transmission using the low-voltage power line. This circuit includes all the analog blocks needed for input interfacing and modulation/demodulation (PLL-based frequency synthesis, slave filter banks with PLL master VCO for tuning, and decision circuitry) plus the logic circuitry needed for control purposes. The circuit operates correctly within the industrial temperature range, from -45 to 80°C, under 5% variations of the 3.3V supply voltage.ComisiĂłn Interministerial de Ciencia y TecnologĂ­a 1FD97-1611(TIC)Ministerio de Ciencia y TecnologĂ­a TIC2001-092

    On the development of a MODEM for data transmission and control of electrical household appliances using the low-voltage power-line

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    This paper presents a CMOS 0,6ÎŒm mixed-signal MODEM ASIC for data transmission on the low-voltage power line. The circuit includes all the analog circuitry needed for input interfacing and modulation/demodulation (PLL-based frequency synthesis, slave filter banks with PLL master VCO for tuning, decision circuitry, etc.) plus the logic circuitry needed for control purposes. The circuit operates correctly in the whole industrial temperature range, from -45 to 80°C, under 5% variations of the 3.3V supply voltage.ComisiĂłn Interministerial de Ciencia y TecnologĂ­a FD97-1611(TIC)Ministerio de Ciencia y TecnologĂ­a TIC200 1-092

    A low-energy rate-adaptive bit-interleaved passive optical network

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    Energy consumption of customer premises equipment (CPE) has become a serious issue in the new generations of time-division multiplexing passive optical networks, which operate at 10 Gb/s or higher. It is becoming a major factor in global network energy consumption, and it poses problems during emergencies when CPE is battery-operated. In this paper, a low-energy passive optical network (PON) that uses a novel bit-interleaving downstream protocol is proposed. The details about the network architecture, protocol, and the key enabling implementation aspects, including dynamic traffic interleaving, rate-adaptive descrambling of decimated traffic, and the design and implementation of a downsampling clock and data recovery circuit, are described. The proposed concept is shown to reduce the energy consumption for protocol processing by a factor of 30. A detailed analysis of the energy consumption in the CPE shows that the interleaving protocol reduces the total energy consumption of the CPE significantly in comparison to the standard 10 Gb/s PON CPE. Experimental results obtained from measurements on the implemented CPE prototype confirm that the CPE consumes significantly less energy than the standard 10 Gb/s PON CPE

    Characterization of the CBC2 readout ASIC for the CMS strip-tracker high-luminosity upgrade

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    The CMS Binary Chip 2 (CBC2) is a full-scale prototype ASIC developed for the front-end readout of the high-luminosity upgrade of the CMS silicon strip tracker. The 254-channel, 130 nm CMOS ASIC is designed for the binary readout of double-layer modules, and features cluster-width discrimination and coincidence logic for detecting high-PT track candidates. The chip was delivered in January 2013 and has since been bump-bonded to a dual-chip hybrid and extensively tested. The CBC2 is fully functional and working to specification: we present the result of electrical characterization of the chip, including gain, noise, threshold scan and power consumption, together with the performance of the stub finding logic. Finally we will outline the plan for future developments towards the production version

    Financial system inquiry: final report

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    Executive summary This report responds to the objective in the Inquiry’s Terms of Reference to best position Australia’s financial system to meet Australia’s evolving needs and support economic growth. It offers a blueprint for an efficient and resilient financial system over the next 10 to 20 years, characterised by the fair treatment of users.   The Inquiry has made 44 recommendations relating to the Australian financial system. These recommendations reflect the Inquiry’s judgement and are based on evidence received by the Inquiry. The Inquiry’s test has been one of public interest: the interests of individuals, businesses, the economy, taxpayers and Government.   Australia’s financial system has performed well since the Wallis Inquiry and has many strong characteristics. It also has a number of weaknesses: taxation and regulatory settings distort the flow of funding to the real economy; it remains susceptible to financial shocks; superannuation is not delivering retirement incomes efficiently; unfair consumer outcomes remain prevalent; and policy settings do not focus on the benefits of competition and innovation. As a result, the system is prone to calls for more regulation.   To put these issues in context, the Overview first deals with the characteristics of Australia’s economy. It then describes the characteristics of and prerequisites for a well-functioning financial system and the Inquiry’s philosophy of financial regulation.   The Inquiry focuses on seven themes in this report (summarised in Guide to the Financial System Inquiry Final Report).   The Overview deals with the general themes of funding the Australian economy and competition.   The Inquiry has also made recommendations on five specific themes, which comprise the next chapters of this report: Strengthen the economy by making the financial system more resilient. Lift the value of the superannuation system and retirement incomes. Drive economic growth and productivity through settings that promote innovation. Enhance confidence and trust by creating an environment in which financial firms treat customers fairly. Enhance regulator independence and accountability and minimise the need for future regulation. These recommendations seek to improve efficiency, resilience and fair treatment in the Australian financial system, allowing it to achieve its potential in supporting economic growth and enhancing standards of living for current and future generations.   Financial system inquiry committee   Mr David Murray AO (Chair) Mr David Murray AO (Sydney) was most recently the inaugural Chairman of the Australian Government’s Future Fund Board of Guardians between 2006 and 2012. Mr Murray was previously the Chief Executive Officer of the Commonwealth Bank of Australia between 1992 and 2005. In this time, Mr. Murray oversaw the transformation of the Commonwealth Bank from a partly privatised bank to an integrated financial services company. In 2001, he was awarded the Centenary Medal for service to Australian society in banking and corporate governance, and in 2007 he was made an Officer of the Order of Australia for his service to the finance sector, both domestically and globally, and service to the community.   Professor Kevin Davis Professor Kevin Davis (Melbourne) is currently a Professor of Finance at the University of Melbourne, Research Director at the Australian Centre for Financial Studies and a Professor of Finance at Monash University. Professor Davis is also a part-time member of the Australian Competition Tribunal and Co-Chair of the Australia–New Zealand Shadow Financial Regulatory Committee.   Mr Craig Dunn Mr Craig Dunn (Sydney) was most recently Chief Executive Officer and Managing Director of AMP. Mr Dunn led AMP through the global financial crisis and has extensive experience in the financial sector. He was a member of the Australian Government\u27s Financial Sector Advisory Council and the Australian Financial Centre Forum, and an executive member of the Australia Japan Business Co-operation Committee. Mr Dunn is a director of the Australian Government’s Financial Literacy Board.   Ms Carolyn Hewson AO Ms Carolyn Hewson AO (Adelaide) served as an investment banker at Schroders Australia for 15 years. Ms Hewson has over 30 years’ experience in the finance sector and currently serves on the boards of BHP Billiton Ltd and Stockland. Ms Hewson was made an Officer of the Order of Australia for her services to the YWCA and to business. Ms Hewson has served on both the boards of Westpac and AMP and retired from the board of BT Investment Management Ltd and as the Chair of the Westpac Foundation upon her appointment to the Financial System Inquiry Committee.   Dr Brian McNamee AO Dr Brian McNamee AO (Melbourne) served as the Chief Executive Officer and Managing Director of CSL Limited from 1990 to 30 June 2013. During that time, CSL transitioned from a Government-owned enterprise to a global company with a market capitalisation of approximately $30 billion. He has extensive experience in the biotech and global healthcare industries. Dr McNamee was made an Officer of the Order of Australia for his service to business and commerce. &nbsp

    Voltage controlled oscillators for 40Gbit/s cascaded bit-interleaving PON

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    Technologies such as the Internet-of-Things and cloud services demand dynamic bandwidth allocation flexibility, which is not offered by the currently deployed solutions. The Bit-Interleaving PON (BiPON) and its cascaded extension the Cascaded Bit-Interleaving PON (CBI-PON) offer a solution that allows to increase bandwidths, reduce power consumption and have a much more flexible dynamic bandwidth allocation scheme. CBI-PON consists of multiple levels of BiPON with different line rates. For each of these line rates, clock-and-data recovery must be performed, which requires a set of different Voltage Controlled Oscillators (VCOs). This paper presents the VCOs designed for the CABINET chip, an implementation of a CBI-PON network device, allowing clock-and-data recovery for 40Gbit/s, 10 Gbit/s and 2.5 Gbit/s line rates
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