RELEASE: A High-level Paradigm for Reliable Large-scale Server Software

Erlang is a functional language with a much-emulated model for building reliable distributed systems. This paper outlines the RELEASE project, and describes the progress in the rst six months. The project aim is to scale the Erlang's radical concurrency-oriented programming paradigm to build reliable general-purpose software, such as server-based systems, on massively parallel machines. Currently Erlang has inherently scalable computation and reliability models, but in practice scalability is constrained by aspects of the language and virtual machine. We are working at three levels to address these challenges: evolving the Erlang virtual machine so that it can work effectively on large scale multicore systems; evolving the language to Scalable Distributed (SD) Erlang; developing a scalable Erlang infrastructure to integrate multiple, heterogeneous clusters. We are also developing state of the art tools that allow programmers to understand the behaviour of massively parallel SD Erlang programs. We will demonstrate the e ectiveness of the RELEASE approach using demonstrators and two large case studies on a Blue Gene

Monitoring Architecture for Real Time Systems

It can be hard to understand how an operating system - and software in general - reached a certain output just by looking at said output. A simple approach is to use loggers, or simple print statements on some specific critical areas, however that is an approach that does not scale very well in a consistent and manageable way. The purpose of this thesis is to propose and develop a tool - a Monitoring Tool - capable of capturing and recording the execution of a given application with minimal intrusion in the context of real-time embedded systems, namely using a space-qualified version of the RTEMS real-time operating system, and making that information available for further processing and analysis. Multicore environments are also considered. The current state of the art in monitoring and execution tracing is presented, featuring both a literature review and a discussion of existing tools and frameworks. Using an implementation of the proposed architecture, the tool was tested in both unicore and multicore configurations in both sparc and arm architectures, and was able to record execution data of a sample application, with varying degrees of verbosity.Nem sempre é fácil perceber como é que um sistema operativo - e software em geral - chegaram a determinado resultado apenas olhando para este. A abordagem normal é usar registos, ou pequenas impressões em locais estratégicos do código, no entanto esta abordagem não é escalável de forma consistente e sustentada. O propósito desta tese é o de propor e desenvolver uma ferramenta - uma ferramenta de monitorização - capaz de capturar e registar a execução de uma dada aplicação com o mínimo de impacto no contexto de sistemas embebidos de tempo-real, nomeadamente usando uma versão do sistema operativo de tempo-real Real-Time Executive for Multiprocessor Systems (RTEMS) qualificada para o espaço, e colocando essa informação à disposição para processamento e análise futura. Ambientes com múltiplos núcleos de processamento são também considerados. O atual estado da arte em monitorização e registo de execução de software é apresentado, destacando tanto exemplos da literatura como ferramentas e frameworks existentes. Usando uma implementação da arquitetura proposta, a ferramenta foi testada em configurações com um ou mais núcleos de processamento em arquiteturas sparc e arm, tendo sido capaz de registar e gravar dados da execução de uma aplicação de exemplo, como vários níveis de detalhe

ePAPI: Performance Application Programming Interface for Embedded Platforms

Performance Monitoring Counters (PMCs) have been traditionally used in the mainstream computing domain to perform debugging and optimization of software performance. PMCs are increasingly considered in embedded time-critical domains to collect in-depth information, e.g. cache misses and memory accesses, of software execution time on complex multicore platforms. In main-stream platforms, standardized specifications and applications like the Performance Application Programming Interface (PAPI) and perf have been proposed to deal with variable PMC support across platforms, by providing a shared interface for configuring and collecting traceable events. However, no equivalent solution exists for embedded critical processors for which the user is required to deal with low-level, platform-specific, and error-prone manipulation of PMC registers. In this paper, we address the need for a standardized PMC interface in the embedded domain, especially in view to support timing characterization of embedded platforms. We assess the compatibility of the PAPI interface with the PMC support available on the AURIX TC297, a reference automotive platform, and we implement and validate ePAPI, the first functionally-equivalent and low-overhead implementation of PAPI for the considered embedded platform

Thin Hypervisor-Based Security Architectures for Embedded Platforms

Virtualization has grown increasingly popular, thanks to its benefits of isolation, management, and utilization, supported by hardware advances. It is also receiving attention for its potential to support security, through hypervisor-based services and advanced protections supplied to guests. Today, virtualization is even making inroads in the embedded space, and embedded systems, with their security needs, have already started to benefit from virtualization’s security potential. In this thesis, we investigate the possibilities for thin hypervisor-based security on embedded platforms. In addition to significant background study, we present implementation of a low-footprint, thin hypervisor capable of providing security protections to a single FreeRTOS guest kernel on ARM. Backed by performance test results, our hypervisor provides security to a formerly unsecured kernel with minimal performance overhead, and represents a first step in a greater research effort into the security advantages and possibilities of embedded thin hypervisors. Our results show that thin hypervisors are both possible and beneficial even on limited embedded systems, and sets the stage for more advanced investigations, implementations, and security applications in the future

Evaluation of the parallel computational capabilities of embedded platforms for critical systems

Modern critical systems need higher performance which cannot be delivered by the simple architectures used so far. Latest embedded architectures feature multi-cores and GPUs, which can be used to satisfy this need. In this thesis we parallelise relevant applications from multiple critical domains represented in the GPU4S benchmark suite, and perform a comparison of the parallel capabilities of candidate platforms for use in critical systems. In particular, we port the open source GPU4S Bench benchmarking suite in the OpenMP programming model, and we benchmark the candidate embedded heterogeneous multi-core platforms of the H2020 UP2DATE project, NVIDIA TX2, NVIDIA Xavier and Xilinx Zynq Ultrascale+, in order to drive the selection of the research platform which will be used in the next phases of the project. Our result indicate that in terms of CPU and GPU performance, the NVIDIA Xavier is the highest performing platform