Inductive Power Transfer for Electric Vehicles Using Gallium Nitride Power Transistors

This chapter will present the application of the GaN Gate Injection Transistor (GIT) in Inductive Power Transfer (IPT) for Electric Vehicles (EV). IPT provides significant benefits over conventional plug-in chargers but suffers from lower efficiency. A high frequency inverter using GaN GIT, which has low on-resistance and gate charge, is implemented to reduce switching and conduction loss, resulting in higher efficiency. Different gate drive strategies will be compared for driving the GaN GIT at high slew rates while ensuring cross-conduction protection. The switching characteristics of the GaN GIT are studied and the inverter is designed to ensure low switching losses, while keeping overshoot and slew rates under control. Experiment results presented will demonstrate that the system efficiency peaks at 95% at 100 kHz operation and 92% at 250 kHz operation for a coil gap of 80 mm at 2 kW output power

Design of Analog CMOS Circuits for Batteryless Implantable Telemetry Systems

A wireless biomedical telemetry system is a device that collects biomedical signal measurements and transmits data through wireless RF communication. Testing medical treatments often involves experimentation on small laboratory animals, such as genetically modified mice and rats. Using batteries as a power source results in many practical issues, such as increased size of the implant and limited operating lifetime. Wireless power harvesting for implantable biomedical devices removes the need for batteries integrated into the implant. This will reduce device size and remove the need for surgical replacement due to battery depletion. Resonant inductive coupling achieves wireless power transfer in a manner modelled by a step down transformer. With this methodology, power harvesting for an implantable device is realized with the use of a large primary coil external to the subject, and a smaller secondary coil integrated into the implant. The signal received from the secondary coil must be regulated to provide a stable direct current (DC) power supply, which will be used to power the electronics in the implantable device. The focus of this work is on development of an electronic front-end for wireless powering of an implantable biomedical device. The energy harvesting front-end circuit is comprised of a rectifier, LDO regulator, and a temperature insensitive voltage reference. Physical design of the front-end circuit is developed in 0.13um CMOS technology with careful attention to analog layout issues. Post-layout simulation results are presented for each sub-block as well as the full front-end structure. The LDO regulator operates with supply voltages in the range of 1V to 1.5V with quiescent current of 10.5uA The complete power receiver front-end has a power conversion efficiency of up to 29%

Design and measurement considerations for WBG switching circuits

Wide Band Gap (WBG) transistors using materials such as Gallium Nitride (GaN) and Silicon Carbide (SiC) offer superior electrical and thermal properties, as well as fast switching capability. However, the high dv/dt and high di/dt may cause ringing with the parasitic inductances and capacitances in the switching loop, increasing overshoot voltages and reducing confidence in the design. Also, making accurate measurements of the switching behaviour without unduly loading the circuit under test is challenging and further impedes the development of WBG applications. This paper presents a prototype WBG Development Platform, built around a half-bridge switched inductive load test circuit. Additional circuits are integrated on to the main PCB for test and measurement purposes: These include a high bandwidth linear current gate-drive circuit and a high bandwidth on-board measurement system. These sub-circuits are described in detail in this paper, together with the switching waveforms that have been achieved during tests with SiC MOSFETs. The authors demonstrate a practical implementation for high frequency WBG power circuits

Low-power switched capacitor voltage reference

Low-power analog design represents a developing technological trend as it emerges from a rather limited range of applications to a much wider arena affecting mainstream market segments. It especially affects portable electronics with respect to battery life, performance, and physical size. Meanwhile, low-power analog design enables technologies such as sensor networks and RFID. Research opportunities abound to exploit the potential of low power analog design, apply low-power to established fields, and explore new applications. The goal of this effort is to design a low-power reference circuit that delivers an accurate reference with very minimal power consumption. The circuit and device level low-power design techniques are suitable for a wide range of applications. To meet this goal, switched capacitor bandgap architecture was chosen. It is the most suitable for developing a systematic, and groundup, low-power design approach. In addition, the low-power analog cell library developed would facilitate building a more complex low-power system. A low-power switched capacitor bandgap was designed, fabricated, and fully tested. The bandgap generates a stable 0.6-V reference voltage, in both the discrete-time and continuous-time domain. The system was thoroughly tested and individual building blocks were characterized. The reference voltage is temperature stable, with less than a 100 ppm/°C drift, over a --60 dB power supply rejection, and below a 1 [Mu]A total supply current (excluding optional track-and-hold). Besides using it as a voltage reference, potential applications are also described using derivatives of this switched capacitor bandgap, specifically supply supervisory and on-chip thermal regulation

Characterization and Utilization of 600 V GaN GITs for 4.5 kW Single Phase Inverter Design

Superior properties allow for faster switching and higher power density converters. However, the fast switching capability of GaN, while theoretically beneficial to converter design, presents several challenges due to the presence of printed circuit board (PCB) and device parasitics. Therefore, it is imperative that the results of device characterization reflect actual device behavior in order to adequately model the device for converter design. This thesis focuses on characterization and utilization of 600 V/30 A Gallium Nitride gate injection transistors, or GaN GITs. The experimental data from static and dynamic characterization was used to maximize the performance of the devices in each phase leg of a 4.5 kW, single-phase, full-bridge inverter. The impact of PCB and device parasitics on switching behavior was also investigated, and a trade-off study of switching loss, overshoot voltage, and dead time loss is presented. Device packaging is also of interest regarding the design of high-frequency devices. This thesis compares the impact of two package designs for the GIT device by designing two separate inverters with the same specifications utilizing the different packages. Finally, due to the lower critical energy of the GaN HEMT during a short circuit, this thesis studies the short-circuit robustness of the devices. The performance of a unique gate sensing protection scheme is compared between two different packages, and the impact of the gate drive and protection circuit design parameters on performance is evaluated

Design and construction of a half-bridge using wide-bandgap transistors

A continuously increasing demand of electric power makes energy efficiency imperative in modern technology. The transistor is considered as the fundamental element of modern electronic products

Modeling, Measurement and Mitigation of Fast Switching Issues in Voltage Source Inverters

Wide-bandgap devices are enjoying wider adoption across the power electronics industry for their superior properties and the resulting opportunities for higher efficiency and power density. However, various issues arise due to the faster switching speed, including switching transient voltage overshoot, unstable oscillation, gate driving and evaluation difficulty, measurement and monitoring challenge, and potential load insulation degradation. This dissertation first sets out to model and understand the switching transient voltage overshoots. Unique oscillation patterns and features of the turn-on and turn-off overvoltage are discovered and analyzed, which provides new insights into the switching transient. During the experimental characterization, a new unstable oscillation pattern is found during the trench MOSFET\u27s turn-off transient. The MOSFET channel may be falsely turned back on, resulting in severe oscillation and possible loss of control. Time-domain and large-signal analytical models are established, which reveals the negative impact of common-source inductances and unconventional capacitance curve of trench MOSFET. Besides the devices themselves, another determining part in their switching transient behavior is the gate driver. A programmable gate driver platform is proposed to readily adapt to different power semiconductors and driving schemes, which can greatly facilitate the evaluation and comparison of different devices and driving schemes. The faster switching speed of wide-bandgap devices also requires more demanding measurement and monitoring solutions. A novel combinational Rogowski coil concept is proposed, which leverages the self-integrating feature to further increase the bandwidth. Prototypes achieved more than 300 MHz bandwidth, while keeping the cross-sectional area less than 2.5 mm$^2$. Finally, the very high voltage slew rate of wide-bandgap devices may negatively impact the motor load insulation. Attempting to fully utilize the higher switching frequency capability, sinewave and $dv/dt$ filters are compared. It is shown that sinewave filters can achieve higher efficiency and power density than $dv/dt$ filters, especially for high frequency applications

A High-Temperature, High-Voltage SOI Gate Driver Integrated Circuit with High Drive Current for Silicon Carbide Power Switches

High-temperature integrated circuit (IC) design is one of the new frontiers in microelectronics that can significantly improve the performance of the electrical systems in extreme environment applications, including automotive, aerospace, well-logging, geothermal, and nuclear. Power modules (DC-DC converters, inverters, etc.) are key components in these electrical systems. Power-to-volume and power-to-weight ratios of these modules can be significantly improved by employing silicon carbide (SiC) based power switches which are capable of operating at much higher temperature than silicon (Si) and gallium arsenide (GaAs) based conventional devices. For successful realization of such high-temperature power electronic circuits, associated control electronics also need to perform at high temperature. In any power converter, gate driver circuit performs as the interface between a low-power microcontroller and the semiconductor power switches. This dissertation presents design, implementation, and measurement results of a silicon-on-insulator (SOI) based high-temperature (\u3e200 _C) and high-voltage (\u3e30 V) universal gate driver integrated circuit with high drive current (\u3e3 A) for SiC power switches. This mixed signal IC has primarily been designed for automotive applications where the under-hood temperature can reach 200 _C. Prototype driver circuits have been designed and implemented in a Bipolar-CMOS- DMOS (BCD) on SOI process and have been successfully tested up to 200 _C ambient temperature driving SiC switches (MOSFET and JFET) without any heat sink and thermal management. This circuit can generate 30V peak-to-peak gate drive signal and can source and sink 3A peak drive current. Temperature compensating and temperature independent design techniques are employed to design the critical functional units like dead-time controller and level shifters in the driver circuit. Chip-level layout techniques are employed to enhance the reliability of the circuit at high temperature. High-temperature test boards have been developed to test the prototype ICs. An ultra low power on-chip temperature sensor circuit has also been designed and integrated into the gate-driver die to safeguard the driver circuit against excessive die temperature (_ 220 _C). This new temperature monitoring approach utilizes a reverse biased p-n junction diode as the temperature sensing element. Power consumption of this sensor circuit is less than 10 uW at 200 _C

Design and Test of a Gate Driver with Variable Drive and Self-Test Capability Implemented in a Silicon Carbide CMOS Process

Discrete silicon carbide (SiC) power devices have long demonstrated abilities that outpace those of standard silicon (Si) parts. The improved physical characteristics allow for faster switching, lower on-resistance, and temperature performance. The capabilities unleashed by these devices allow for higher efficiency switch-mode converters as well as the advance of power electronics into new high-temperature regimes previously unimaginable with silicon devices. While SiC power devices have reached a relative level of maturity, recent work has pushed the temperature boundaries of control electronics further with silicon carbide integrated circuits. The primary requirement to ensure rapid switching of power MOSFETs was a gate drive buffer capable of taking a control signal and driving the MOSFET gate with high current required. In this work, the first integrated SiC CMOS gate driver was developed in a 1.2 μm SiC CMOS process to drive a SiC power MOSFET. The driver was designed for close integration inside a power module and exposure to high temperatures. The drive strength of the gate driver was controllable to allow for managing power MOSFET switching speed and potential drain voltage overshoot. Output transistor layouts were optimized using custom Python software in conjunction with existing design tool resources. A wafer-level test system was developed to identify yield issues in the gate driver output transistors. This method allowed for qualitative and quantitative evaluation of transistor leakage while the system was under probe. Wafer-level testing and results are presented. The gate driver was tested under high temperature operation up to 530 degrees celsius. An integrated module was built and tested to illustrate the capability of the gate driver to control a power MOSFET under load. The adjustable drive strength feature was successfully demonstrated