6 research outputs found

    Low Noise Amplifier using Darlington Pair At 90nm Technology

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    The demand of low noise amplifier (LNA) has been rising in today’s communication system. LNA is the basic building circuit of the receiver section satellite. The design concept demonstrates the design trade off with NF, gain, power consumption. This paper reports on with analysis of wideband LNA. This paper shows the schematic of LNA by using Darlington pair amplifier. This LNA has been fabricated on 90nm CMOS process. This paper is focused on to make comparison of three stage and single stage LNA. Here, the phase mismatch between these patameters is quantitavely analyzed to study the effect on gain and noise figure (NF). In this paper, single stage LNA has shown the 23 dB measured gain, while the three stages LNA has demonstrated 29 dB measured gain. Here, LNA designed using darlington pair shows low NF of 3.3-4.8 dB, which comparable to other reported single stage LNA designs and appreciably low compared to the three stages LNA. Hence, findings from this paper suggest the use of single stage LNA designed using Darlington pair in transceiver satellite applications

    RF Amplification and Filtering Techniques for Cellular Receivers

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    The usage of various wireless standards, such as Bluetooth, Wi-Fi, GPS, and 4G/5G cellular, has been continually increasing. In order to utilize the frequency bands efficiently and to support new communication standards with lower power consumption, lower occupied volume and at reduced costs, multimode transceivers, software defined radios (SDRs), cognitive radios, etc., have been actively investigated. Broadband behavior of a wireless receiver is typically defined by its front-end low-noise amplifier (LNA), whose design must consider trade-offs between input matching, noise figure (NF), gain, bandwidth, linearity, and voltage headroom in a given process technology. Moreover, monolithic RF wireless receivers have been trending toward high intermediatefrequency (IF) or superhetrodyne radios thanks to recent breakthroughs in silicon integration of band-pass channel-select filters. The main motivation is to avoid the common issues in the currently predominant zero/low-IF receivers, such as poor 2nd-order nonlinearity, sensitivity to 1/f (i.e. flicker) noise and time-variant dc offsets, especially in the fine CMOS technology. To avoid interferers and blockers at the susceptible image frequencies that the high-IF entails, band-pass filters (BPF) with high quality (Q) factor components for sharp transfer-function transition characteristics are now required. In addition, integrated low-pass filters (LPF) with strong rejection of out-of-band frequency components are essential building blocks in a variety of applications, such as telecommunications, video signal processing, anti-aliasing filtering, etc. Attention is drawn toward structures featuring low noise, small area, high in-/out-of-band linearity performance, and low-power consumption. This thesis comprises three main parts. In the first part (Chapters 2 and 3), we focus on the design and implementation of several innovative wideband low-noise (transconductance) amplifiers [LN(T)A] for wireless cellular applications. In the first design, we introduce new approaches to reduce the noise figure of the noise-cancellation LNAs without sacrificing the power consumption budget, which leads to NF of 2 dB without adding extra power consumption. The proposed LNAs also have the capability to be used in current-mode receivers, especially in discrete-time receivers, as in the form of low noise transconductance amplifier (LNTA). In the second design, two different two-fold noise cancellation approaches are proposed, which not only improve the noise performance of the design, but also achieve high linearity (IIP3=+4.25 dBm). The proposed LN(T)As are implemented in TSMC 28-nm LP CMOS technology to prove that they are suitable for applications such as sub-6 GHz 5G receivers. The second objective of this dissertation research is to invent a novel method of band-pass filtering, which leads to achieving very sharp and selective band-pass filtering with high linearity and low input referred (IRN) noise (Chapter 4). This technique improves the noise and linearity performance without adding extra clock phases. Hence, the duty cycle of the clock phases stays constant, despite the sophisticated improvements. Moreover, due to its sharp filtering, it can filter out high blockers of near channels and can increase the receiver’s blocker tolerance. With the same total capacitor size and clock duty cycle as in a 1st-order complex charge-sharing band-pass filter (CS BPF), the proposed design achieves 20 dB better out-of-band filtering compared to the prior-art 1st-order CS BPF and 10 dB better out-of-band filtering compared to the conventional 2nd-order C-CS BPF. Finally, the stop-band rejection of the discrete-time infinite-impulse response (IIR) lowpass filter is improved by applying a novel technique to enhance the anti-aliasing filtering (Chapter 5). The aim is to introduce a 4th-order charge rotating (CR) discrete-time (DT) LPF, which achieves the record of stop-band rejection of 120 dB by using a novel pseudolinear interpolation technique while keeping the sampling frequency and the capacitor values constant

    Reconfigurable Receiver Front-Ends for Advanced Telecommunication Technologies

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    The exponential growth of converging technologies, including augmented reality, autonomous vehicles, machine-to-machine and machine-to-human interactions, biomedical and environmental sensory systems, and artificial intelligence, is driving the need for robust infrastructural systems capable of handling vast data volumes between end users and service providers. This demand has prompted a significant evolution in wireless communication, with 5G and subsequent generations requiring exponentially improved spectral and energy efficiency compared to their predecessors. Achieving this entails intricate strategies such as advanced digital modulations, broader channel bandwidths, complex spectrum sharing, and carrier aggregation scenarios. A particularly challenging aspect arises in the form of non-contiguous aggregation of up to six carrier components across the frequency range 1 (FR1). This necessitates receiver front-ends to effectively reject out-of-band (OOB) interferences while maintaining high-performance in-band (IB) operation. Reconfigurability becomes pivotal in such dynamic environments, where frequency resource allocation, signal strength, and interference levels continuously change. Software-defined radios (SDRs) and cognitive radios (CRs) emerge as solutions, with direct RF-sampling receivers offering a suitable architecture in which the frequency translation is entirely performed in digital domain to avoid analog mixing issues. Moreover, direct RF- sampling receivers facilitate spectrum observation, which is crucial to identify free zones, and detect interferences. Acoustic and distributed filters offer impressive dynamic range and sharp roll off characteristics, but their bulkiness and lack of electronic adjustment capabilities limit their practicality. Active filters, on the other hand, present opportunities for integration in advanced CMOS technology, addressing size constraints and providing versatile programmability. However, concerns about power consumption, noise generation, and linearity in active filters require careful consideration.This thesis primarily focuses on the design and implementation of a low-voltage, low-power RFFE tailored for direct sampling receivers in 5G FR1 applications. The RFFE consists of a balun low-noise amplifier (LNA), a Q-enhanced filter, and a programmable gain amplifier (PGA). The balun-LNA employs noise cancellation, current reuse, and gm boosting for wideband gain and input impedance matching. Leveraging FD-SOI technology allows for programmable gain and linearity via body biasing. The LNA's operational state ranges between high-performance and high-tolerance modes, which are apt for sensitivityand blocking tests, respectively. The Q-enhanced filter adopts noise-cancelling, current-reuse, and programmable Gm-cells to realize a fourth-order response using two resonators. The fourth-order filter response is achieved by subtracting the individual response of these resonators. Compared to cascaded and magnetically coupled fourth-order filters, this technique maintains the large dynamic range of second-order resonators. Fabricated in 22-nm FD-SOI technology, the RFFE achieves 1%-40% fractional bandwidth (FBW) adjustability from 1.7 GHz to 6.4 GHz, 4.6 dB noise figure (NF) and an OOB third-order intermodulation intercept point (IIP3) of 22 dBm. Furthermore, concerning the implementation uncertainties and potential variations of temperature and supply voltage, design margins have been considered and a hybrid calibration scheme is introduced. A combination of on-chip and off-chip calibration based on noise response is employed to effectively adjust the quality factors, Gm-cells, and resonance frequencies, ensuring desired bandpass response. To optimize and accelerate the calibration process, a reinforcement learning (RL) agent is used.Anticipating future trends, the concept of the Q-enhanced filter extends to a multiple-mode filter for 6G upper mid-band applications. Covering the frequency range from 8 to 20 GHz, this RFFE can be configured as a fourth-order dual-band filter, two bandpass filters (BPFs) with an OOB notch, or a BPF with an IB notch. In cognitive radios, the filter’s transmission zeros can be positioned with respect to the carrier frequencies of interfering signals to yield over 50 dB blocker rejection

    Energy efficiency analysis in wireless communication systems with reconfigurable RF

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    Orientador: Prof. Dr. André Augusto MarianoCoorientador: Prof. Dr. Glauber Gomes de Oliveira BranteTese (doutorado) - Universidade Federal do Paraná, Setor de Tecnologia, Programa de Pós-Graduação em Engenharia Elétrica. Defesa : Curitiba, 28/05/2021Inclui referências: p. 74-84Área de concentração: Sistemas EletrônicosResumo: Alta eficiˆencia energ'etica (EE) 'e crucial para aplicac¸ ˜oes da Internet das Coisas que operam remotamente, uma vez que os n'os sem fio s˜ao tipicamente alimentados por bateria. Diferentes t'ecnicas de diversidade espacial tais com o uso de m'ultiplas antenas (MIMO) nos n'os do transmissor e receptor, bem como o uso de comunicac¸ ˜ao cooperativa podem ser exploradas para melhorar a EE. Al'em disso, o uso de transceptores de r'adio frequˆencia (RF) reconfigur'aveis s˜ao considerados uma soluc¸ ˜ao interessante para sistemas com restric¸ ˜ao de energia, pois permitem alterar o seu ponto de funcionamento, bem como o seu consumo de potˆencia, adaptando-se aos diferentes requisitos de comunicac¸ ˜ao. Nessa tese, uma nova abordagem para economizar energia inclui no modelo do sistema de comunicac¸ ˜ao o uso de transceptores de RF reconfigur'aveis. Mais especificamente, os componentes envolvidos em nossa estrutura de otimizac¸ ˜ao de consumo de potˆencia s˜ao o amplificador de potˆencia (PA) no transmissor e o amplificador de baixo ru'?do (LNA) no receptor. Nosso objetivo 'e mostrar que os circuitos de RF baseados em operac¸ ˜oes mult'?modo podem melhorar significativamente a EE. Assim, realizamos uma selec¸ ˜ao conjunta dos melhores modos de operac¸ ˜ao para os circuitos do PA e do LNA para diferentes esquemas de transmiss˜ao em dois cen'arios de rede: i) comunicac¸ ˜ao n˜ao-cooperativa em que os n'os s˜ao equipados com m'ultiplas antenas, para a qual consideramos a selec¸ ˜ao de antenas (AS) e a decomposic¸ ˜ao por valores singulares (SVD); e ii) comunicac¸ ˜ao cooperativa em que os n'os s˜ao equipados com uma 'unica antena, para a qual consideramos decodificac¸ ˜ao incremental e encaminha (IDF) por rel'e. Em nosso primeiro cen'ario proposto, comparamos os circuitos reconfigur 'aveis do PA e do LNA com amplificadores de RF n˜ao-reconfigur'aveis do estado-da-arte dispon'?veis na literatura. Nesta comparac¸ ˜ao, ao explorar as caracter'?sticas dos amplificadores reconfigur'aveis de RF, mostramos uma melhora de EE de mais de 40% em distˆancias curtas para as comunicac¸ ˜oes MIMO. Ao comparar os esquemas MIMO, a t'ecnica AS apresenta melhor desempenho para distˆancias mais curtas, enquanto que o SVD permite transmiss˜oes mais longas, pois explora todas as antenas dispon'?veis. Al'em disso, a otimizac¸ ˜ao da eficiˆencia espectral contribui para aumentar ainda mais a EE. Por fim, investigamos o efeito do n'umero de antenas, em que a EE do AS sempre aumenta com o n'umero de antenas, enquanto que o SVD apresenta um n'umero 'otimo de antenas. Para o segundo cen'ario, propomos uma an'alise de EE para o esquema IDF, auxiliada por um canal de retorno para realizar a selec¸ ˜ao de rel'es. Al'em disso, comparamos o desempenho do IDF com os esquemas MIMO n˜ao-cooperativos. Os resultados mostram que uma melhor EE 'e obtida por meio de t'ecnicas de selec¸ ˜ao de antenas, principalmente quando aplicadas tanto no transmissor quanto no receptor. Tamb'em analisamos o impacto do rel'e na cooperac¸ ˜ao, uma vez que o n'o do rel'e opera apenas se necess'ario, a maior parte da carga de reconfigurabilidade 'e do rel'e, enquanto os modos de operac¸ ˜ao do PA e do LNA tendem a ser razoavelmente fixados nos n'os de origem e destino. Por fim, os resultados mostram que o n'umero de rel'es contribui para alcanc¸ar transmiss˜oes de longa distˆancia. Palavras-chave: Eficiˆencia Energ'etica, Transceptores de RF Reconfigur'aveis, Diversidade Espacial, M'ultiplas Antenas, Comunicac¸ ˜oes Cooperativas.Abstract: High energy efficiency (EE) is crucial for Internet of Things applications that operate remotely, since wireless nodes are typically battery-powered. Different spatial diversity techniques such as the use of multiple antennas (MIMO) at the transmitter and receiver nodes, as well as the use of cooperative communication can be exploited to improve the EE. In addition, the use of radio frequency (RF) transceivers are considered an interesting solution for powerrestricted systems, as they allow changing their operating point, as well as their power consumption, adapting to different communication requirements. In this thesis, a novel energy-saving approach includes in the communication system model the use of reconfigurable RF transceivers. More specifically, the components involved in our power consumption optimization framework are the power amplifier (PA) at the transmitter and the low noise amplifier (LNA) at the receiver. Our goal is to show that RF circuits based on multimode operation can significantly improve the EE. Thus, we perform a joint selection of the best operating modes for the PA and LNA circuits for different transmission schemes in two network scenarios: i) non-cooperative communication where the nodes are equipped with multiple antennas, for which we consider antenna selection (AS) and singular value decomposition (SVD) beamforming; and ii) cooperative communication where the nodes are equipped with single antenna, for which we consider incremental decode and forward (IDF) relaying. In our first proposed scenario, we compare the reconfigurable PA and LNA circuits with state-of-the-art non-reconfigurable RF amplifiers available in the literature. In this comparison, by exploiting the characteristics of reconfigurable RF amplifiers, we show an EE improvement of more than 40% at short distances for MIMO communications. When comparing MIMO schemes, the AS technique performs better for shorter distances, while the SVD allows for longer transmissions, as it exploits all available antennas. In addition, the optimization of the spectral efficiency contributes to further increase the EE. Finally, we investigate the effect of the number of antennas, in which the EE of AS always increases with the number of antennas, while SVD presents an optimal number of antennas. For the second scenario, we propose an EE analysis for the IDF scheme, aided by a feedback channel to perform relay selection. In addition, we compare the performance of the IDF with non-cooperative MIMO schemes. The results show that a better EE is obtained through antenna selection techniques, especially when applied at both transmitter and receiver. We also analyze the impact of the relay on cooperation, as the relay node operates only if necessary, most of the reconfigurability charge ends up at the relay, whereas the PA and LNA operating modes tend to be reasonably fixed at the source and destination nodes. Finally, results show that the number of relays contributes to achieving long distance transmissions. Keywords: Energy Efficiency, Reconfigurable RF Transceivers, Spatial Diversity, Multiple Antennas, Cooperative Communications

    Towards the Design of Robust High-Speed and Power Efficient Short Reach Photonic Links

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    In 2014, approximately eight trillion transistors were fabricated every second thanks to improvements in integration density and fabrication processes. This increase in integration and functionality has also brought about the possibility of system on chip (SoC) and high-performance computing (HPC). Electrical interconnects presently dominate the very-short reach interconnect landscape (< 5 cm) in these applications. This, however, is expected to change. These interconnects' downfall will be caused by their need for impedance matching, limited pin-density and frequency dependent loss leading to intersymbol interference. In an attempt to solve this, researchers have increasingly explored integrated silicon photonics as it is compatible with current CMOS processes and creates many possibilities for short-reach applications. Many see optical interconnects as the high-speed link solution for applications ranging from intra-data center (~200 m) down to module or even chip scales (< 2 cm). The attractive properties of optical interconnects, such as low loss and multiplexing abilities, will enable such things as Exascale high-performance computers of the future (equal to 10^18 calculations per second). In fact, forecasts predict that by 2025 photonics at the smallest levels of the interconnect hierarchy will be a reality. This thesis presents three novel research projects, which all work towards increasing robustness and cost-efficiency in short-reach optical links. It discusses three parts of the optical link: the interconnect, the receiver and the photodiode. The first topic of this thesis is exploratory work on the use of an optical multiplexing technique, mode-division multiplexing (MDM), to carry multiple data lanes along with a forwarded clock for very short-reach applications. The second topic discussed is a novel reconfigurable CMOS receiver proposed as a method to map a clock signal to an interconnect lane in an MDM source-synchronous link with the lowest optical crosstalk. The receiver is designed as a method to make electronic chips that suit the needs of optical ones. By leveraging the more robust electronic integrated circuit, link solutions can be tuned to meet the needs of photonic chips on a die by die basis. The third topic of this thesis proposes a novel photodetector which uses photonic grating couplers to redirect vertical incident light to the horizontal direction. With this technique, the light is applied along the entire length of a p-n junction to improve the responsivity and speed of the device. Experimental results for this photodetector at 35 Gb/s are published, showing it to be the fastest all-silicon based photodetector reported in the literature at the time of publication
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