11,775 research outputs found
neuroAIx-Framework: design of future neuroscience simulation systems exhibiting execution of the cortical microcircuit model 20× faster than biological real-time
IntroductionResearch in the field of computational neuroscience relies on highly capable simulation platforms. With real-time capabilities surpassed for established models like the cortical microcircuit, it is time to conceive next-generation systems: neuroscience simulators providing significant acceleration, even for larger networks with natural density, biologically plausible multi-compartment models and the modeling of long-term and structural plasticity.MethodsStressing the need for agility to adapt to new concepts or findings in the domain of neuroscience, we have developed the neuroAIx-Framework consisting of an empirical modeling tool, a virtual prototype, and a cluster of FPGA boards. This framework is designed to support and accelerate the continuous development of such platforms driven by new insights in neuroscience.ResultsBased on design space explorations using this framework, we devised and realized an FPGA cluster consisting of 35 NetFPGA SUME boards.DiscussionThis system functions as an evaluation platform for our framework. At the same time, it resulted in a fully deterministic neuroscience simulation system surpassing the state of the art in both performance and energy efficiency. It is capable of simulating the microcircuit with 20× acceleration compared to biological real-time and achieves an energy efficiency of 48nJ per synaptic event
On the Mechanism of Building Core Competencies: a Study of Chinese Multinational Port Enterprises
This study aims to explore how Chinese multinational port enterprises (MNPEs) build
their core competencies. Core competencies are firms’special capabilities and sources
to gain sustainable competitive advantage (SCA) in marketplace, and the concept led
to extensive research and debates. However, few studies include inquiries about the
mechanisms of building core competencies in the context of Chinese MNPEs.
Accordingly, answers were sought to three research questions:
1. What are the core competencies of the Chinese MNPEs?
2. What are the mechanisms that the Chinese MNPEs use to build their core
competencies?
3. What are the paths that the Chinese MNPEs pursue to build their resources bases?
The study adopted a multiple-case study design, focusing on building mechanism of
core competencies with RBV. It selected purposively five Chinese leading MNPEs
and three industry associations as Case Companies.
The study revealed three main findings. First, it identified three generic core
competencies possessed by Case Companies, i.e., innovation in business models and
operations, utilisation of technologies, and acquisition of strategic resources. Second,
it developed the conceptual framework of the Mechanism of Building Core
Competencies (MBCC), which is a process of change of collective learning in
effective and efficient utilization of resources of a firm in response to critical events.
Third, it proposed three paths to build core competencies, i.e., enhancing collective
learning, selecting sustainable processes, and building resource base.
The study contributes to the knowledge of core competencies and RBV in three ways:
(1) presenting three generic core competencies of the Chinese MNPEs, (2) proposing
a new conceptual framework to explain how Chinese MNPEs build their core
competencies, (3) suggesting a solid anchor point (MBCC) to explain the links among
resources, core competencies, and SCA. The findings set benchmarks for Chinese
logistics industry and provide guidelines to build core competencies
Sensors and Methods for Railway Signalling Equipment Monitoring
Signalling upgrade projects that have been installed in equipment rooms in the recent past have limited capability to monitor performance of certain types of external circuits. To modify the equipment rooms on the commissioned railway would prove very expensive to implement and would be unacceptable in terms of delays caused to passenger services due to re-commissioning circuits after modification, to comply with rail signalling standards. The use of magnetoresistive sensors to provide performance data on point circuit operation and point operation is investigated. The sensors are bench tested on their ability to measure current in a circuit in a non-intrusive manner. The effect of shielding on the sensor performance is tested and found to be significant. The response of the sensors with various levels of amplification produces linear responses across a range of circuit gain. The output of the sensor circuit is demonstrated for various periods of interruption of conductor current. A three-axis accelerometer is mounted on a linear actuator to demonstrate the type of output expected from similar sensors mounted on a set of points. Measurements of current in point detection circuits and acceleration forces resulting from vibration of out of tolerance mechanical assemblies can provide valuable information on performance and possible threats to safe operation of equipment. The sensors seem capable of measuring the current in a conductor with a comparatively high degree of sensitivity. There is development work required on shielding the sensor from magnetic fields other than those being measured. The accelerometer work is at a demonstration level and requires development. The future testing work with accelerometers should be at a facility where multiple point moves can be made; with the capability to introduce faults to the point mechanisms. Methods can then be developed for analysis of the vibration signatures produced by the various faults
Full stack development toward a trapped ion logical qubit
Quantum error correction is a key step toward the construction of a large-scale quantum computer, by preventing small infidelities in quantum gates from accumulating over the course of an algorithm. Detecting and correcting errors is achieved by using multiple physical qubits to form a smaller number of robust logical
qubits. The physical implementation of a logical qubit requires multiple qubits, on which high fidelity gates
can be performed.
The project aims to realize a logical qubit based on ions confined on a microfabricated surface trap. Each
physical qubit will be a microwave dressed state qubit based on 171Yb+ ions. Gates are intended to be realized through RF and microwave radiation in combination with magnetic field gradients. The project vertically integrates software down to hardware compilation layers in order to deliver, in the near future, a fully functional small device demonstrator.
This thesis presents novel results on multiple layers of a full stack quantum computer model. On the hardware level a robust quantum gate is studied and ion displacement over the X-junction geometry is demonstrated.
The experimental organization is optimized through automation and compressed waveform data transmission. A new quantum assembly language purely dedicated to trapped ion quantum computers is introduced. The demonstrator is aimed at testing implementation of quantum error correction codes while preparing for larger
scale iterations.Open Acces
On the Evaluation of User Privacy in Deep Neural Networks using Timing Side Channel
Recent Deep Learning (DL) advancements in solving complex real-world tasks
have led to its widespread adoption in practical applications. However, this
opportunity comes with significant underlying risks, as many of these models
rely on privacy-sensitive data for training in a variety of applications,
making them an overly-exposed threat surface for privacy violations.
Furthermore, the widespread use of cloud-based Machine-Learning-as-a-Service
(MLaaS) for its robust infrastructure support has broadened the threat surface
to include a variety of remote side-channel attacks. In this paper, we first
identify and report a novel data-dependent timing side-channel leakage (termed
Class Leakage) in DL implementations originating from non-constant time
branching operation in a widely used DL framework PyTorch. We further
demonstrate a practical inference-time attack where an adversary with user
privilege and hard-label black-box access to an MLaaS can exploit Class Leakage
to compromise the privacy of MLaaS users. DL models are vulnerable to
Membership Inference Attack (MIA), where an adversary's objective is to deduce
whether any particular data has been used while training the model. In this
paper, as a separate case study, we demonstrate that a DL model secured with
differential privacy (a popular countermeasure against MIA) is still vulnerable
to MIA against an adversary exploiting Class Leakage. We develop an
easy-to-implement countermeasure by making a constant-time branching operation
that alleviates the Class Leakage and also aids in mitigating MIA. We have
chosen two standard benchmarking image classification datasets, CIFAR-10 and
CIFAR-100 to train five state-of-the-art pre-trained DL models, over two
different computing environments having Intel Xeon and Intel i7 processors to
validate our approach.Comment: 15 pages, 20 figure
FPGA and software design for time-resolved Raman spectroscopy
Abstract. In this work, is provided an FPGA design and a PC software as a user interface for controlling the Raman spectrometer and sensor. The objective was to achieve over 1 MHz measurement rate in single point measurement mode and enable optional mode for multipoint measurements. Other objectives were improving resolution by changing reference clock rate quickly between measurements and generating a 3D histogram for determining Raman spectre and fluorescence lifetime of the sample.
The FPGA used for data storing is designed so that it can read 5376 bits (7-bit timing values, 256 channels, 3 different results) and form a histogram based on the results after each laser pulse. The final FPGA design uses a 150 MHz main clock, and the same frequency is used for transferring the measurement data from the sensor IC. The FPGA design allows to 1.689 MHz laser being used in single point measurement mode and correspondingly 654 kHz laser in multipoint measurement mode. The user interface is built so that it allows the measurements to be done in series so that some parameters can be changed between measurements. One main feature is the ability to change reference clock rate between the measurements which allows improving of the measurement resolution. The reference clock rate change takes approximately 10 ns which affects insignificantly to the total measurement time. The user interface has, as an additional feature, possibility to scan a sample by controlling motors that move the sample between measurements during the series.
All requirements were achieved well, and the final work enables versatile measurement possibilities for time-resolving Raman spectroscopy.FPGA- ja käyttöliittymäsuunnittelu aikaerotteista Raman-spektroskopiaa varten. Tiivistelmä. Tämän työn tarkoituksena oli tuottaa FPGA-konfiguraatio ja suunnitella käyttöliittymä Raman-spektrometrin ja sensorin ohjaukseen. Tavoitteena oli yli 1 MHz mittaustahdin saavuttaminen yhden mittauspiteen mittaamiseen ja mahdollistaa myös useamman pisteen mittaukset. Muita tavoitteita olivat resoluution parantaminen referenssitaajuuden vaihtamisella nopeasti mittasarjojen välissä ja 3D-histogrammin generointi Raman-spektrin ja fluoresenssielinajan määritykseen.
FPGA on suunniteltu siten, että se voi lukea 5376 bittiä (7-bittisiä aika-arvoja, 256 kanavaa, 3 mittauskohdetta) jokaisen laser-pulssin jälkeen ja muodostaa datasta histogrammin. Lopullinen FPGA-konfiguraatio käyttää 150 MHz:n pääkelloa, ja samaa taajuutta käytetään myös mittausdatan siirtämiseen integroidulta sensoripiiriltä PC:lle. Maksimissaan 1,689 MHz laseria voidaan käyttää yhden mittauspisteen mittauksissa ja, kun monipisteinen mittausmoodi on käytössä, voidaan käyttää maksimissaan 654 kHz laseria. Käyttöliittymä on rakennettu siten, että mittauksia voidaan tehdä sarjassa siten, että mittausten välissä voidaan muuttaa mittausparametreja. Yksi pääominaisuksista on mahdollisuus muuttaa toista referenssikelloa mittausten välissä, mikä mahdollistaa mittauksen resoluution parantamisen. Tämä referenssikellon taajuuden vaihtuminen kestää noin 10 ns, minkä vaikutus mittauksen kokonaiskestoon on mitätön. Käyttöliittymä mahdollistaa lisäominaisuutena myös skannausmittausten tekemisen, jolloin moottoreiden avulla näytettä liikutellaan mittausten välissä.
Kaikki tavoitteet saavutettiin hyvin, ja lopullinen työ mahdollistaa monipuoliset mittaukset aikaerotteisessa Raman-spektroskopiassa
Industry 4.0: product digital twins for remanufacturing decision-making
Currently there is a desire to reduce natural resource consumption and expand circular business principles whilst Industry 4.0 (I4.0) is regarded as the evolutionary and potentially disruptive movement of technology, automation, digitalisation, and data manipulation into the industrial sector. The remanufacturing industry is recognised as being vital to the circular economy (CE) as it extends the in-use life of products, but its synergy with I4.0 has had little attention thus far. This thesis documents the first investigating into I4.0 in remanufacturing for a CE contributing a design and demonstration of a model that optimises remanufacturing planning using data from different instances in a product’s life cycle.
The initial aim of this work was to identify the I4.0 technology that would enhance the stability in remanufacturing with a view to reducing resource consumption. As the project progressed it narrowed to focus on the development of a product digital twin (DT) model to support data-driven decision making for operations planning. The model’s architecture was derived using a bottom-up approach where requirements were extracted from the identified complications in production planning and control that differentiate remanufacturing from manufacturing. Simultaneously, the benefits of enabling visibility of an asset’s through-life health were obtained using a DT as the modus operandi. A product simulator and DT prototype was designed to use Internet of Things (IoT) components, a neural network for remaining life estimations and a search algorithm for operational planning optimisation. The DT was iteratively developed using case studies to validate and examine the real opportunities that exist in deploying a business model that harnesses, and commodifies, early life product data for end-of-life processing optimisation. Findings suggest that using intelligent programming networks and algorithms, a DT can enhance decision-making if it has visibility of the product and access to reliable remanufacturing process information, whilst existing IoT components provide rudimentary “smart” capabilities, but their integration is complex, and the durability of the systems over extended product life cycles needs to be further explored
Platform protocol place: a practice-based study of critical media art practice (2007-2020)
This practice-based research project focuses on critical media art practices in contemporary digital culture. The theoretical framework employed in this inquiry draws from the work of the Frankfurt School, in particular Theodor Adorno and Max Horkheimer’s The Culture Industry: Enlightenment as Mass Deception. Using Adorno & Horkheimer’s thesis as a theoretical guide, this research project formulates the concept of the digital culture industry - a concept that refers to the contemporary era of networked capitalism, an era defined by the unprecedented extraction, accumulation and manipulation of data and the material and digital infrastructures that facilitate it. This concept is used as a framing mechanism that articulates certain techno-political concerns within networked capitalism and responds to them through practice.
The second concept formulated within this research project is Platform Protocol Place. The function of this second concept is to frame and outline the body of practice-based work developed in this study. It is also used to make complex technological issues accessible and to communicate these issues through public exhibition and within this written thesis.
The final concept developed in this research project is tactical media archaeology. This concept describes the techniques and approaches employed in the development of the body of practice-based work that are the central focus of this research project. This approach is a synthesis of two subfields of media art practice and theory, tactical media and media archaeology. Through practice, tactical media archaeology critiques the geopolitical machinations and systems beneath the networked devices and interfaces of the digital culture industry
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