A Wideband Inductorless CMOS Front-End for Software Defined

The number of wireless communication links is witnessing tremendous growth and new standards are being introduced at high pace. These standards heavily rely on digital signal processing, making CMOS the first technology of choice. However, RF CMOS circuit development is costly and time consuming due to mask costs and design iterations. This pleads for a Software Defined Radio approach, in which one piece of flexible radio hardware is re-used for different applications and standards, downloadable and under software control. To the best of our knowledge, little work has been done in this field based on CMOS technology. Recently, a bipolar downconverter front-end has been proposed [1]. In CMOS, only wideband low-noise amplifiers have been proposed, and some CMOS tuner ICs for satellite reception (which have less stringent noise requirements because they are preceded by an outdoor low-noise converter). This paper presents a wideband RF downconverter frontend in 0.18 um CMOS (also published in [2]), designed in the context of a research project exploring the feasibility of software defined radio, using a combined Bluetooth/WLAN receiver as a vehicle. Usually, RF receivers are optimised for low power consumption. In contrast, we have taken the approach to optimise for flexibility. The paper discusses the main system and circuit design choices, and assesses the achievable performance via measurements on a front-end implemented in 0.18um CMOS. The flexible design achieves a 0.2-2.2 GHz -3 dB bandwidth, a gain of 25 dB with 6 dB noise figure and +1 dBm IIP3

Broadband RF Front-End Design for Multi-Standard Receiver with High-Linearity and Low-Noise Techniques

Future wireless communication devices must support multiple standards and features on a single-chip. The trend towards software-defined radio requires flexible and efficient RF building blocks which justifies the adoption of broadband receiver front-ends in modern and future communication systems. The broadband receiver front-end significantly reduces cost, area, pins, and power, and can process several signal channels simultaneously. This research is mainly focused on the analysis and realization of the broadband receiver architecture and its various building blocks (LNA, Active Balun-LNA, Mixer, and trans-impedance amplifier) for multi-standard applications. In the design of the mobile DTV tuner, a direct-conversion receiver architecture is adopted achieving low power, low cost, and high dynamic-range for DVB-H standard. The tuner integrates a single-ended RF variable gain amplifier (RFVGA), a current-mode passive mixer, and a combination of continuous and discrete-time baseband filter with built-in anti-aliasing. The proposed RFVGA achieves high dynamic-range and gain-insensitive input impedance matching performance. The current-mode passive mixer achieves high gain, low noise, and high linearity with low power supplies. A wideband common-gate LNA is presented that overcomes the fundamental trade-off between power and noise match without compromising its stability. The proposed architecture can achieve the minimum noise figure over the previously reported feedback amplifiers in common-gate configuration. The proposed architecture achieves broadband impedance matching, low noise, large gain, enhanced linearity, and wide bandwidth concurrently by employing an efficient and reliable dual negative-feedback. For the wideband Inductorless Balun-LNA, active single-to-differential architecture has been proposed without using any passive inductor on-chip which occupies a lot of silicon area. The proposed Balun-LNA features lower power, wider bandwidth, and better gain and phase balance than previously reported architectures of the same kind. A surface acoustic wave (SAW)-less direct conversion receiver targeted for multistandard applications is proposed and fabricated with TSMC 0.13?m complementary metal-oxide-semiconductor (CMOS) technology. The target is to design a wideband SAW-less direct coversion receiver with a single low noise transconductor and current-mode passive mixer with trans-impedance amplifier utilizing feed-forward compensation. The innovations in the circuit and architecture improves the receiver dynamic range enabling highly linear direct-conversion CMOS front-end for a multi-standard receiver

Design of broadband inductor-less RF front-ends with high dynamic range for G.hn

System-on-Chip (SoC) was adopted in recent years as one of the solutions to reduce the cost of integrated systems. When the SoC solution started to be used, the final product was actually more expensive due to lower yield. The developments in integrated technology through the years allowed the integration of more components in lesser area with a better yield. Thus, SoCs became a widely used solution to reduced the cost of the final product, integrating into a single-chip the main parts of a system: analog, digital and memory. As integrated technology kept scaling down to allow a higher density of transistors and thus providing more functionality with the same die area, the analog RF parts of the SoC became a bottleneck to cost reduction as inductors occupy a large die area and do not scale down with technology. Hence, the trend moves toward the research and design of inductor-less SoCs that further reduce the cost of the final solution. Also, as the demand for home networking high-data-rates communication systems has increased over the last decade, several standards have been developed to satisfy the requirements of each application, the most popular being wireless local area networks (WLANs) based on the IEEE 802.11 standard. However, poor signal propagation across walls make WLANs unsuitable for high-speed applications such as high-definition in-home video streaming, leading to the development of wired technologies using the existing in-home infrastructure. The ITU-T G.hn recommendation (G.9960 and G.9961) unifies the most widely used wired infrastructures at home (coaxial cables, phone lines and power lines) into a single standard for high-speed data transmission of up to 1 Gb/s. The G.hn recommendation defines a unified networking over power lines, phone lines and coaxial cables with different plans for baseband and RF. The RF-coax bandplan, where this thesis is focused, uses 50 MHz and 100 MHz bandwidth channels with 256 and 512 carriers respectively. The center frequency can range from 350 MHz to 2450 MHz. The recommendation specifies a transmission power limit of 5 dBm for the 50 MHz bandplan and 8~dBm for the 100 MHz bandplan, therefore the maximum transmitted power in each carrier is the same for both bandplans. Due to the nature of an in-home wired environment, receivers that can handle both very large and very small amplitude signals are required; when transmitter and receiver are connected on the same electric outlet there is no channel attenuation and the signal-to-noise-plus-distortion ratio (SNDR) is dominated by the receiver linearity, whereas when transmitter and receiver are several rooms apart channel attenuation is high and the SNDR is dominated by the receiver noise figure. The high dynamic range specifications for these receivers require the use of configurable-gain topologies that can provide both high-linearity and low-noise for different configurations. Thus, this thesis has been aimed at researching high dynamic range broadband inductor-less topologies to be used as the RF front-end for a G.hn receiver complying with the provided specifications. A large part of the thesis has been focused on the design of the input amplifier of the front-end, which is the most critical stage as the noise figure and linearity of the input amplifier define the achievable overall specifications of the whole front-end. Three prototypes has been manufactured using a 65 nm CMOS process: two input RFPGAs and one front-end using the second RFPGA prototype.El "sistema en un chip" (SoC) fue adoptado recientemente como una de las soluciones para reducir el coste de sistemas integrados. Cuando se empezó a utilizar la solución SoC, el producto final era más caro debido al bajo rendimiento de producción. Los avances en tecnología integrada a lo largo de los años han permitido la integración de más componentes en menos área con mejoras en rendimiento. Por lo tanto, SoCs pasó a ser una solución ampliamente utilizada para reducir el coste del producto final, integrando en un único chip las principales partes de un sistema: analógica, digital y memoria. A medida que las tecnologías integradas se reducían en tamaño para permitir una mayor densisdad de transistores y proveer mayor funcionalidad con la misma área, las partes RF analógicas del SoC pasaron a ser la limitación en la reducción de costes ya que los inductores ocupan mucha área y no escalan con la tecnología. Por lo tanto, las tendencias en investigación se mueven hacia el diseño de SoCs sin inductores que todavía reducen más el coste final del producto. También, a medida que la demanda en sistemas de comunicación domésticos de alta velocidad ha crecido a lo largo de la última década, se han desarrollado varios estándares para satisfacer los requisitos de cada aplicación, siendo las redes sin hilos (WLANs) basadas en el estándar IEEE 802.11 las más populares. Sin embargo, una pobre propagación de señal a través de las paredes hacen que las WLANs sean inadecuadas para aplicaciones de alta-velocidad como transmisión de vídeo de alta definición en tiempo real, resultando en el desarrollo de tecnologías con hilos utilizando la infraestructura existente en los domicilios. La recomendación ITU-T G.hn (G.9960 and G.9961) unifica las principales infraestructuras con hilos domésticas (cables coaxiales, línias de teléfono y línias de electricidad) en un sólo estándar para la transmisión de datos hasta 1 Gb/s. La recomendación G.hn define una red unificada sobre línias de electricidad, de teléfono y coaxiales con diferentes esquemas para banda base y RF. El esquema RF-coax en el cual se basa esta tesis, usa canales con un ancho de banda de 50 MHz y 100 MHz con 256 y 512 portadoras respectivamente. La frecuencia centra puede variar desde 350 MHz hasta 2450 MHz. La recomendación especifica un límite en la potencia de transmisión de 5 dBm para el esquema de 50 MHz y 8 dBm para el esquema de 100 MHz, de tal forma que la potencia máxima por portadora es la misma en ambos esquemas. Debido a la estructura de un entorno doméstico con hilos, los receptores deben ser capaces de procesar señales con amplitud muy grande o muy pequeña; cuando transmisor y receptor están conectados en la misma toma eléctrica no hay atenuación de canal y el ratio de señal a rudio más distorsión (SNDR) está dominado por la linealidad del receptor, mientras que cuando transmisor y receptor están separados por varias habitaciones la atenuación es elevada y el SNDR está dominado por la figura de ruido del receptor. Los elevados requisitos de rango dinámico para este tipo de receptores requieren el uso de topologías de ganancia configurable que pueden proporcionar tanto alta linealidad como bajo ruido para diferentes configuraciones. Por lo tanto, esta tesis está encarada a la investigación de topologías sin inductores de banda ancha y elevado rango dinámico para ser usadas a la entrada de un receptor G.hn cumpliendo con las especificaciones proporcionadas. Una gran parte de la tesis se ha centrado en el diseño del amplificador de entrada al ser la etapa más crítica, ya que la figura de ruido y linealidad del amplificador de entrada definen lás máximas especificaciones que el sistema puede conseguir. Se han fabricado 3 prototipos con un proceso CMOS de 65 nm: 2 amplificadores y un sistema completo con amplificador y mezclador.Postprint (published version

A new vision of software defined radio: from academic experimentation to industrial explotation

The broad objective of this study is to examine the role of Software Defined Radio in an industrial field. Basically examines the changes that have to be done to achieve moving this technology in a commercial domain. It is important to predict the impacts of the introduction of Software Defined Radio in the telecommunications industry because it is a real future that is coming. The project starts with the evolution of mobile telecommunications systems through the history. Following this, Software Defined Radio is defined and its main features are commented such as its architecture. Moreover, it wants to predict the changes that the telecommunications industry will might suffer with the introduction of SDR and some future structural and organizational variations are suggested. Additionally, it is discussed the positive and negative aspects of the introduction of SDR in the commercial domain from different points of view and finally, the future SDR mobile phone is described with its possible hardware and software.Outgoin