2D Modeling of Bipolar Junction Transistors

The purpose of this report is to summarize the progress to date on the development of a 2D computer model for bipolar junction transistors. The goals of this project, which ends December 31, 1988, can be broken into two main categories and are listed below: Code Modifications 1. Modify existing 2D solar cell simulation code to handle bipolar junction transistors. 2. Incorporate energy balance equations into the computer model. 3. Incorporate transient and small signal ac analyses. Code Applications 1. Assess performance differences between Delco small and large thin epi devices. 2. Evaluate a polysilicon modification of the thin epi process. 3. Provide general analytic support. 4. Investigate extraction of SPICE parameters from simulation results. 5. Provide version of the code to Delco Electronics. The solar cell code, SCAP2D (Solar Cell Analysis Program in 2 Dimensions), has been successfully modified to handle bipolar junction transistors. This code has been named DAP2D (Device Analysis Program in 2 Dimensions). The major weakness of the code at the present time is its inability to model the Delco thin epi device adequately. The structure of this device is sufficiently complicated that computational restrictions in the present version of DAP2D require that simplifying assumptions be made when modeling this device. This problem is being addressed by the installation of a software package which will reduce the restrictions on device structure complexity (Chapter 3). Some simulation results are presented in Chapter 2. The most significant modeling result to date is the prediction that a factor of about 3 improvement in β can be expected with the addition of a polysilicon emitter contact. This result was obtained by assuming that the polysilicon contact can be modeled by an effective contact recombination velocity. Several appendices are also included in this report. Appendix A contains an overview of the numerical methods used to solve the semiconductor equations which are used to model device behavior. A user’s manual for DAP2D is presented in Appendix B. An example simulation is presented in Appendices C and D

Self-reconfiguring solar cell system

A self-reconfiguring solar cell array is disclosed wherein some of the cells are switched so that they can be either in series or in shunt within the array. This feature of series or parallel switching of cells allows the array to match the load to achieve maximum power transfer. Automatic control is used to determine the conditions for maximum power operation and to switch the array into the appropriate configuration necessary to transfer maximum power to the load

Additional Evidence Supporting a Model of Shallow, High-Speed Supergranulation

Recently, Duvall and Hanasoge ({\it Solar Phys.} {\bf 287}, 71-83, 2013) found that large distance $[\Delta]$ separation travel-time differences from a center to an annulus $[\delta t_{\rm{oi}}]$ implied a model of the average supergranular cell that has a peak upflow of $240\rm{ms^{-1}}$ at a depth of $2.3\rm{Mm}$ and a corresponding peak outward horizontal flow of $700\rm{ms^{-1}}$ at a depth of $1.6\rm{Mm}$. In the present work, this effect is further studied by measuring and modeling center-to-quadrant travel-time differences $[\delta t_{\rm{qu}}]$, which roughly agree with this model. Simulations are analyzed that show that such a model flow would lead to the expected travel-time differences. As a check for possible systematic errors, the center-to-annulus travel-time differences $[\delta t_{\rm{oi}}]$ are found not to vary with heliocentric angle. A consistency check finds an increase of $\delta t_{\rm{oi}}$ with the temporal frequency $[\nu]$ by a factor of two, which is not predicted by the ray theory

Assignment of capacitance spectroscopy signals of CIGS solar cells to effects of non-ohmic contacts

A

NMOS-based integrated modular bypass for use in solar systems (NIMBUS): intelligent bypass for reducing partial shading power loss in solar panel applications

NMOS-based Integrated Modular Bypass for Use in Solar systems (NIMBUS) is designed as a replacement for the traditional bypass diode, used in common solar panels. Because of the series connection between the individual solar cells, the power output of a photovoltaic (PV) panel will drop disproportionally under partial shading. Currently, this is solved by dividing the PV panel into substrings, each with a diode bypass placed in parallel. This allows an alternative current path. However, the diodes still have a significant voltage drop (about 350 mV), and due to the fairly large currents in a panel, the diodes are dissipating power that we would rather see at the output of the panel. The NIMBUS chip, being a low-voltage-drop switch, aims to replace these diodes and, thus, reduce that power loss. NIMBUS is a smart bypass: a completely stand-alone system that detects the failing of one or more cells and activates when necessary. It is designed for a 100-mV voltage drop under a 5-A load current. When two or more NIMBUS chips are placed in parallel, an internal synchronization circuit ensures proper operation to provide for larger load currents. This paper will elaborate on the operation, design and implementation of the NIMBUS chip, as well as on the first measurements