VLSI implementation of an energy-aware wake-up detector for an acoustic surveillance sensor network

We present a low-power VLSI wake-up detector for a sensor network that uses acoustic signals to localize ground-base vehicles. The detection criterion is the degree of low-frequency periodicity in the acoustic signal, and the periodicity is computed from the "bumpiness" of the autocorrelation of a one-bit version of the signal. We then describe a CMOS ASIC that implements the periodicity estimation algorithm. The ASIC is functional and its core consumes 835 nanowatts. It was integrated into an acoustic enclosure and deployed in field tests with synthesized sounds and ground-based vehicles.Fil: Goldberg, David H.. Johns Hopkins University; Estados UnidosFil: Andreou, Andreas. Johns Hopkins University; Estados UnidosFil: Julian, Pedro Marcelo. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Universidad Nacional del Sur. Departamento de Ingeniería Eléctrica y de Computadoras; ArgentinaFil: Pouliquen, Philippe O.. Johns Hopkins University; Estados UnidosFil: Riddle, Laurence. Signal Systems Corporation; Estados UnidosFil: Rosasco, Rich. Signal Systems Corporation; Estados Unido

Nanophotonic reservoir computing with photonic crystal cavities to generate periodic patterns

Reservoir computing (RC) is a technique in machine learning inspired by neural systems. RC has been used successfully to solve complex problems such as signal classification and signal generation. These systems are mainly implemented in software, and thereby they are limited in speed and power efficiency. Several optical and optoelectronic implementations have been demonstrated, in which the system has signals with an amplitude and phase. It is proven that these enrich the dynamics of the system, which is beneficial for the performance. In this paper, we introduce a novel optical architecture based on nanophotonic crystal cavities. This allows us to integrate many neurons on one chip, which, compared with other photonic solutions, closest resembles a classical neural network. Furthermore, the components are passive, which simplifies the design and reduces the power consumption. To assess the performance of this network, we train a photonic network to generate periodic patterns, using an alternative online learning rule called first-order reduced and corrected error. For this, we first train a classical hyperbolic tangent reservoir, but then we vary some of the properties to incorporate typical aspects of a photonics reservoir, such as the use of continuous-time versus discrete-time signals and the use of complex-valued versus real-valued signals. Then, the nanophotonic reservoir is simulated and we explore the role of relevant parameters such as the topology, the phases between the resonators, the number of nodes that are biased and the delay between the resonators. It is important that these parameters are chosen such that no strong self-oscillations occur. Finally, our results show that for a signal generation task a complex-valued, continuous-time nanophotonic reservoir outperforms a classical (i.e., discrete-time, real-valued) leaky hyperbolic tangent reservoir (normalized root-mean-square errors = 0.030 versus NRMSE = 0.127)

Design, implementation and testing of a digital baseband receiver for spread spectrum telesensing

Telesensing involves receiving data wirelessly from a remote sensor Generally, the sensor node is fixed and configured to transmit only or perform very basic reception Because of their low power consumption, telesensors can be powered by a battery for long periods of time without a measurement or transmission interruption This allows several nodes to be placed at strategic locations and creates a need to have all the individual data collected and processed at a centralized location Frequency Division Multiple Access (FDMA) provides robust data transmission from multiple telesensors to the same receiver at the cost of added bandwidth. This thesis focuses on the digital recovery of spread spectrum data in an FDMA system A general digital spread spectrum receiver architecture is given(without transceiving capability) and each component is designed,implemented and tested m the receiver as a whole A sliding correlator with a threshold is used to synchronize the pseudonoise (PN) code used to encode the data with the incoming data System clocks are also recovered from the incoming data and distributed to the downstream modules The design is implemented in an FPGA and tested with favorable packet error rate results m an FDMA system The components of the digital receiver processor could be used in conjunction with a Costas Loop demodulator to provide CDMA for multiple sensors and its functionality and robustness are confirmed in this thesis This would fit into a complete CDMA, allowing the demodulator to discriminate between various sensor

Strategies for Devising Automatic Signal Recognition Algorithms in a Shared Radio Environment

In an increasingly congested and complex radio environment interference is to be expected, which poses problems for Automatic Signal Recognition (ASR) systems. This thesis explores strategies for improving ASR performance in the presence of interference. The thesis breaks the overall research question down into a number of subquestions and explores each of these in turn. A Phase-symmetric Cross Recurrence Plot is developed and used to show how a radio signal can be manipulated to separate information about the modulation from the information being carried. The Logarithmic Cyclic frequency Domain Profile is introduced to illustrate how a logarithmic representation can be used for analysing mixtures of signals with very different cyclic frequencies. After defining a canonical ASR system architecture, the concepts of an Ideal Feature and Interference Selectivity are introduced and applied to typical features used in ASR processing. Finally it is shown how these algorithmic developments can be combined in a Bayesian chain implementation that can accommodate a wide variety of feature extraction algorithms. It is concluded that future ASR systems will require features that can handle a wide range of signal types with much higher levels of interference selectivity if they are to achieve acceptable performance in shared spectrum bands. Intelligent segmentation is shown to be a requirement for future ASR systems unless features can be developed that have near ideal performance

Simulation and implementation of a linear predictive coder

The main objective of this research was to design and build a Linear Predictive Coder (LPC) based on the TMS320 processor, and to incorporate this in the design of a low bit rate voice coding server for a Cambridge Ring. In order to decide on a suitable algorithm for the LPC, extensive simulations were carried out on a BBC computer. The computer used was interfaced to a frame store which, although its original purpose was to store video information, acted as a suitable store for speech. Up to six seconds of speech could be fed in from a microphone in real time for analysis. The BBC was fitted with a second processor, but in spite of this the processing times were very slow. [Continues.

A miniature, lowpower , intelligent sensor node for persistent acoustic surveillance

ABSTRACT The desire for persistent, long term surveillance and covertness places severe constraints on the power consumption of a sensor node. To achieve the desired endurance while minimizing the size of the node, it is imperative to use application-specific integrated circuits (ASICs) that deliver the required performance with maximal power efficiency while minimizing the amount of communication bandwidth needed. This paper reviews our ongoing effort to integrate several micropower devices for low-power wake-up detection, blind source separation and localization and pattern classification, and demonstrate the utility of the system in relevant surveillance applications. The capabilities of each module are presented in detail along with performance statistics measured during recent experiments

An investigation of potential applications of OP-SAPS: Operational Sampled Analog Processors

The application of OP-SAP's (operational sampled analog processors) in pattern recognition system is summarized. Areas investigated include: (1) human face recognition; (2) a high-speed programmable transversal filter system; (3) discrete word (speech) recognition; and (4) a resolution enhancement system