Configurable and Scalable High Throughput Turbo Decoder Architecture for Multiple 4GWireless Standards

In this paper, we propose a novel multi-code turbo decoder architecture for 4G wireless systems. To support various 4G standards, a configurable multi-mode MAP (maximum a posteriori) decoder is designed for both binary and duo-binary turbo codes with small resource overhead (less than 10%) compared to the single-mode architecture. To achieve high data rates in 4G, we present a parallel turbo decoder architecture with scalable parallelism tailored to the given throughput requirements. High-level parallelism is achieved by employing contention-free interleavers. Multi-banked memory structure and routing network among memories and MAP decoders are designed to operate at full speed with parallel interleavers. We designed a very low-complexity recursive on-line address generator supporting multiple interleaving patterns, which avoids the interleaver address memory. Design trade-offs in terms of area and power efficiency are explored to find the optimal architectures. A 711 Mbps data rate is feasible with 32 Radix-4 MAP decoders running at 200 MHz clock rate.Texas Instruments Incorporate

Configurable and Scalable Turbo Decoder for 4G Wireless Receivers

The increasing requirements of high data rates and quality of service (QoS) in fourth-generation (4G) wireless communication require the implementation of practical capacity approaching codes. In this chapter, the application of Turbo coding schemes that have recently been adopted in the IEEE 802.16e WiMax standard and 3GPP Long Term Evolution (LTE) standard are reviewed. In order to process several 4G wireless standards with a common hardware module, a reconfigurable and scalable Turbo decoder architecture is presented. A parallel Turbo decoding scheme with scalable parallelism tailored to the target throughput is applied to support high data rates in 4G applications. High-level decoding parallelism is achieved by employing contention-free interleavers. A multi-banked memory structure and routing network among memories and MAP decoders are designed to operate at full speed with parallel interleavers. A new on-line address generation technique is introduced to support multiple Turbo interleaving patterns, which avoids the interleaver address memory that is typically necessary in the traditional designs. Design trade-offs in terms of area and power efficiency are analyzed for different parallelism and clock frequency goals

On the application of graphics processor to wireless receiver design

In many wireless systems, a Turbo decoder is often combined with a soft-output multiple-input and multiple-output (MIMO) detector at the receiver to maximize performance in many 4G and beyond wireless standards. Although custom application specific designs are usually used to meet this challenge, programmable graphics processing units (GPU) has become an alternative to the traditional ASIC and FPGA solution for wireless applications. However, careful architecture-aware algorithm design and mapping are required to maximize performance of a communication block on GPU. For MIMO soft detection, we implemented a new MIMO soft detection algorithm, multi-pass trellis traversal (MTT). For Turbo decoding, we used a parallel window algorithm. We showed that our implementations can achieve high throughput while maintaining good performance. This work will allow us to implement a complete iterative MIMO receiver in software on GPU in the future

Advanced constellation and demapper schemes for next generation digital terrestrial television broadcasting systems

206 p.Esta tesis presenta un nuevo tipo de constelaciones llamadas no uniformes. Estos esquemas presentan una eficacia de hasta 1,8 dB superior a las utilizadas en los últimos sistemas de comunicaciones de televisión digital terrestre y son extrapolables a cualquier otro sistema de comunicaciones (satélite, móvil, cable¿). Además, este trabajo contribuye al diseño de constelaciones con una nueva metodología que reduce el tiempo de optimización de días/horas (metodologías actuales) a horas/minutos con la misma eficiencia. Todas las constelaciones diseñadas se testean bajo una plataforma creada en esta tesis que simula el estándar de radiodifusión terrestre más avanzado hasta la fecha (ATSC 3.0) bajo condiciones reales de funcionamiento.Por otro lado, para disminuir la latencia de decodificación de estas constelaciones esta tesis propone dos técnicas de detección/demapeo. Una es para constelaciones no uniformes de dos dimensiones la cual disminuye hasta en un 99,7% la complejidad del demapeo sin empeorar el funcionamiento del sistema. La segunda técnica de detección se centra en las constelaciones no uniformes de una dimensión y presenta hasta un 87,5% de reducción de la complejidad del receptor sin pérdidas en el rendimiento.Por último, este trabajo expone un completo estado del arte sobre tipos de constelaciones, modelos de sistema, y diseño/demapeo de constelaciones. Este estudio es el primero realizado en este campo

Advanced Applications of Rapid Prototyping Technology in Modern Engineering

Rapid prototyping (RP) technology has been widely known and appreciated due to its flexible and customized manufacturing capabilities. The widely studied RP techniques include stereolithography apparatus (SLA), selective laser sintering (SLS), three-dimensional printing (3DP), fused deposition modeling (FDM), 3D plotting, solid ground curing (SGC), multiphase jet solidification (MJS), laminated object manufacturing (LOM). Different techniques are associated with different materials and/or processing principles and thus are devoted to specific applications. RP technology has no longer been only for prototype building rather has been extended for real industrial manufacturing solutions. Today, the RP technology has contributed to almost all engineering areas that include mechanical, materials, industrial, aerospace, electrical and most recently biomedical engineering. This book aims to present the advanced development of RP technologies in various engineering areas as the solutions to the real world engineering problems