A comparison of classical scheduling approaches in power-constrained block-test scheduling

Classical scheduling approaches are applied here to overcome the problem of unequal-length block-test scheduling under power dissipation constraints. List scheduling-like approaches are proposed first as greedy algorithms to tackle the fore mentioned problem. Then, distribution-graph based approaches are described in order to achieve balanced test concurrency and test power dissipation. An extended tree growing technique is also used in combination with these classical approaches in order to improve the test concurrency having assigned power dissipation limits. A comparison between the results of the test scheduling experiments highlights the advantages and disadvantages of applying different classical scheduling algorithms to the power-constrained test scheduling proble

Forecasting Recharging Demand to Integrate Electric Vehicle Fleets in Smart Grids

Electric vehicle fleets and smart grids are two growing technologies. These technologies provided new possibilities to reduce pollution and increase energy efficiency. In this sense, electric vehicles are used as mobile loads in the power grid. A distributed charging prioritization methodology is proposed in this paper. The solution is based on the concept of virtual power plants and the usage of evolutionary computation algorithms. Additionally, the comparison of several evolutionary algorithms, genetic algorithm, genetic algorithm with evolution control, particle swarm optimization, and hybrid solution are shown in order to evaluate the proposed architecture. The proposed solution is presented to prevent the overload of the power grid

A survey of health care models that encompass multiple departments

In this survey we review quantitative health care models to illustrate the extent to which they encompass multiple hospital departments. The paper provides general overviews of the relationships that exists between major hospital departments and describes how these relationships are accounted for by researchers. We find the atomistic view of hospitals often taken by researchers is partially due to the ambiguity of patient care trajectories. To this end clinical pathways literature is reviewed to illustrate its potential for clarifying patient flows and for providing a holistic hospital perspective

Enabling GPU Support for the COMPSs-Mobile Framework

Using the GPUs embedded in mobile devices allows for increasing the performance of the applications running on them while reducing the energy consumption of their execution. This article presents a task-based solution for adaptative, collaborative heterogeneous computing on mobile cloud environments. To implement our proposal, we extend the COMPSs-Mobile framework – an implementation of the COMPSs programming model for building mobile applications that offload part of the computation to the Cloud – to support offloading computation to GPUs through OpenCL. To evaluate our solution, we subject the prototype to three benchmark applications representing different application patterns.This work is partially supported by the Joint-Laboratory on Extreme Scale Computing (JLESC), by the European Union through the Horizon 2020 research and innovation programme under contract 687584 (TANGO Project), by the Spanish Goverment (TIN2015-65316-P, BES-2013-067167, EEBB-2016-11272, SEV-2011-00067) and the Generalitat de Catalunya (2014-SGR-1051).Peer ReviewedPostprint (author's final draft

Low Power Processor Architectures and Contemporary Techniques for Power Optimization – A Review

The technological evolution has increased the number of transistors for a given die area significantly and increased the switching speed from few MHz to GHz range. Such inversely proportional decline in size and boost in performance consequently demands shrinking of supply voltage and effective power dissipation in chips with millions of transistors. This has triggered substantial amount of research in power reduction techniques into almost every aspect of the chip and particularly the processor cores contained in the chip. This paper presents an overview of techniques for achieving the power efficiency mainly at the processor core level but also visits related domains such as buses and memories. There are various processor parameters and features such as supply voltage, clock frequency, cache and pipelining which can be optimized to reduce the power consumption of the processor. This paper discusses various ways in which these parameters can be optimized. Also, emerging power efficient processor architectures are overviewed and research activities are discussed which should help reader identify how these factors in a processor contribute to power consumption. Some of these concepts have been already established whereas others are still active research areas. © 2009 ACADEMY PUBLISHER