92 research outputs found

    Requirements for a software maintenance support environment

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    This thesis surveys the field of software maintenance, and addresses the maintenance requirements of the Aerospace Industry, which is developing inige projects, running over many years, and sometimes safety critical in nature (e.g. ARIANE 5, HERMES, COLUMBUS). Some projects are collaborative between distributed European partners. The industry will have to cope in the near and far future with the maintenance of these products and it will be essential to improve the software maintenance process and the environments for maintenance. Cost effective software maintenance needs an efficient, high quality and homogeneous environment or Integrated Project Support Environment (IPSE). Most IPSE work has addressed software development, and lias not fully considered the requirements of software maintenance. The aim of this project is to draw up a set of priorities and requirements for a Maintenance IPSE. An IPSE, however can only support a software maintenance method. The first stage of this project is to deline 'software maintenance best practice' addressing the organisational, managerial and technical aspects, along with an evaluation of software maintenance tools for Aerospace systems. From this and an evaluation of current IPSEs, the requirements for a Software Maintenance Support Environment are presented for maintenance of Aerospace software

    Lostrego: a distributed stream-based infrastructure for the real-time gathering and analysis of heterogeneous educational data

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    The quick technological evolution of the last decades has also reached learning environments, where the use of networked computing devices such as laptops, smartphones, tablets, IoT devices, servers, etc. is continuously growing. In particular, those computerized learning environments have the potential to track the activity of teachers and students in them, which enables the development of innovative applications that enrich the learning process by analyzing the collected data. The majority of related work in this field has been centered on batch gathering and analysis of the data. However, in order to integrate more reactive applications, there is a need for an infrastructure that enables the real-time collection and analysis of data in learning environments. Such an infrastructure should be scalable and flexible enough to cope with heterogeneous data coming from different types of learning settings. This paper presents Lostrego, a stream-based, modular, scalable and flexible distributed infrastructure that allows the gathering and analysis of educational data from heterogeneous data sources in a real-time fashion. Lostrego applications are composed by interconnected services that can be reused in different courses. The results of the evaluation of Lostrego in two editions of a computer programming course with 233 students and 384,702 gathered events are also reported.This work was partially funded by: the Spanish Competitiveness and Economy Ministry through projects “RESET UC3M: Reformulando Ecosistemas Escalables Educativos” (TIN 2014 53199 C3 1 R) and “Hermes Smartdriver. Conducción eficiente y procesamiento semántico de la información” (TIN2013 46801 C4 2 R); and by the Community of Madrid through its regional project “eMadrid” (S2013/ICE 2715)

    La gestion de projets Ă  l'HĂ´pital du Valais

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    L’Hôpital du Valais regroupe les hôpitaux valaisans en une institution unique. Il a été créé en 2004 sous le nom « Réseau Santé Valais (RSV) ». Le Conseil d’Administration élabore la stratégie d’entreprise. La Direction Générale est responsable de la gestion opérationnelle. Grâce au MIS (Management Information System), la direction surveille la stratégie d'entreprise. Elle doit également pouvoir suivre les projets stratégiques grâce à un outil informatique adapté à ses besoins. Afin d'alimenter cet outil décisionnel, il faut d'abord travailler avec un logiciel de gestion de projets. A l'Hôpital du Valais, nous avons entrepris la mise en place de SharePoint. Nous travaillons sur la réalisation du projet Intranet/Extranet. Celui-ci a pour but de fédérer et de regrouper sous la même technologie les intranets utilisés actuellement et d'offrir une plateforme collaborative. L'objectif de ce travail est d'évaluer la plateforme Web SharePoint comme solution de gestion de projets, de déterminer ses limites et de savoir s'il est nécessaire d'implémenter MS-Project Server

    Automated Debugging Methodology for FPGA-based Systems

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    Electronic devices make up a vital part of our lives. These are seen from mobiles, laptops, computers, home automation, etc. to name a few. The modern designs constitute billions of transistors. However, with this evolution, ensuring that the devices fulfill the designer’s expectation under variable conditions has also become a great challenge. This requires a lot of design time and effort. Whenever an error is encountered, the process is re-started. Hence, it is desired to minimize the number of spins required to achieve an error-free product, as each spin results in loss of time and effort. Software-based simulation systems present the main technique to ensure the verification of the design before fabrication. However, few design errors (bugs) are likely to escape the simulation process. Such bugs subsequently appear during the post-silicon phase. Finding such bugs is time-consuming due to inherent invisibility of the hardware. Instead of software simulation of the design in the pre-silicon phase, post-silicon techniques permit the designers to verify the functionality through the physical implementations of the design. The main benefit of the methodology is that the implemented design in the post-silicon phase runs many order-of-magnitude faster than its counterpart in pre-silicon. This allows the designers to validate their design more exhaustively. This thesis presents five main contributions to enable a fast and automated debugging solution for reconfigurable hardware. During the research work, we used an obstacle avoidance system for robotic vehicles as a use case to illustrate how to apply the proposed debugging solution in practical environments. The first contribution presents a debugging system capable of providing a lossless trace of debugging data which permits a cycle-accurate replay. This methodology ensures capturing permanent as well as intermittent errors in the implemented design. The contribution also describes a solution to enhance hardware observability. It is proposed to utilize processor-configurable concentration networks, employ debug data compression to transmit the data more efficiently, and partially reconfiguring the debugging system at run-time to save the time required for design re-compilation as well as preserve the timing closure. The second contribution presents a solution for communication-centric designs. Furthermore, solutions for designs with multi-clock domains are also discussed. The third contribution presents a priority-based signal selection methodology to identify the signals which can be more helpful during the debugging process. A connectivity generation tool is also presented which can map the identified signals to the debugging system. The fourth contribution presents an automated error detection solution which can help in capturing the permanent as well as intermittent errors without continuous monitoring of debugging data. The proposed solution works for designs even in the absence of golden reference. The fifth contribution proposes to use artificial intelligence for post-silicon debugging. We presented a novel idea of using a recurrent neural network for debugging when a golden reference is present for training the network. Furthermore, the idea was also extended to designs where golden reference is not present

    Space station systems: A bibliography with indexes (supplement 9)

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    This bibliography lists 1,313 reports, articles, and other documents introduced into the NASA scientific and technical information system between January 1, 1989 and June 30, 1989. Its purpose is to provide helpful information to researchers, designers and managers engaged in Space Station technology development and mission design. Coverage includes documents that define major systems and subsystems related to structures and dynamic control, electronics and power supplies, propulsion, and payload integration. In addition, orbital construction methods, servicing and support requirements, procedures and operations, and missions for the current and future Space Station are included

    A hardware-software codesign framework for cellular computing

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    Until recently, the ever-increasing demand of computing power has been met on one hand by increasing the operating frequency of processors and on the other hand by designing architectures capable of exploiting parallelism at the instruction level through hardware mechanisms such as super-scalar execution. However, both these approaches seem to have reached a plateau, mainly due to issues related to design complexity and cost-effectiveness. To face the stabilization of performance of single-threaded processors, the current trend in processor design seems to favor a switch to coarser-grain parallelization, typically at the thread level. In other words, high computational power is achieved not only by a single, very fast and very complex processor, but through the parallel operation of several processors, each executing a different thread. Extrapolating this trend to take into account the vast amount of on-chip hardware resources that will be available in the next few decades (either through further shrinkage of silicon fabrication processes or by the introduction of molecular-scale devices), together with the predicted features of such devices (e.g., the impossibility of global synchronization or higher failure rates), it seems reasonable to foretell that current design techniques will not be able to cope with the requirements of next-generation electronic devices and that novel design tools and programming methods will have to be devised. A tempting source of inspiration to solve the problems implied by a massively parallel organization and inherently error-prone substrates is biology. In fact, living beings possess characteristics, such as robustness to damage and self-organization, which were shown in previous research as interesting to be implemented in hardware. For instance, it was possible to realize relatively simple systems, such as a self-repairing watch. Overall, these bio-inspired approaches seem very promising but their interest for a wider audience is problematic because their heavily hardware-oriented designs lack some of the flexibility achievable with a general purpose processor. In the context of this thesis, we will introduce a processor-grade processing element at the heart of a bio-inspired hardware system. This processor, based on a single-instruction, features some key properties that allow it to maintain the versatility required by the implementation of bio-inspired mechanisms and to realize general computation. We will also demonstrate that the flexibility of such a processor enables it to be evolved so it can be tailored to different types of applications. In the second half of this thesis, we will analyze how the implementation of a large number of these processors can be used on a hardware platform to explore various bio-inspired mechanisms. Based on an extensible platform of many FPGAs, configured as a networked structure of processors, the hardware part of this computing framework is backed by an open library of software components that provides primitives for efficient inter-processor communication and distributed computation. We will show that this dual software–hardware approach allows a very quick exploration of different ways to solve computational problems using bio-inspired techniques. In addition, we also show that the flexibility of our approach allows it to exploit replication as a solution to issues that concern standard embedded applications

    Parallel computing 2011, ParCo 2011: book of abstracts

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    This book contains the abstracts of the presentations at the conference Parallel Computing 2011, 30 August - 2 September 2011, Ghent, Belgiu
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