RF MEMS reference oscillators platform for wireless communications

A complete platform for RF MEMS reference oscillator is built to replace bulky quartz from mobile devices, thus reducing size and cost. The design targets LTE transceivers. A low phase noise 76.8 MHz reference oscillator is designed using material temperature compensated AlN-on-silicon resonator. The thesis proposes a system combining piezoelectric resonator with low loading CMOS cross coupled series resonance oscillator to reach state-of-the-art LTE phase noise specifications. The designed resonator is a two port fundamental width extensional mode resonator. The resonator characterized by high unloaded quality factor in vacuum is designed with low temperature coefficient of frequency (TCF) using as compensation material which enhances the TCF from - 3000 ppm to 105 ppm across temperature ranges of -40˚C to 85˚C. By using a series resonant CMOS oscillator, phase noise of -123 dBc/Hz at 1 kHz, and -162 dBc/Hz at 1MHz offset is achieved. The oscillator’s integrated RMS jitter is 106 fs (10 kHz–20 MHz), consuming 850 μA, with startup time is 250μs, achieving a Figure-of-merit (FOM) of 216 dB. Electronic frequency compensation is presented to further enhance the frequency stability of the oscillator. Initial frequency offset of 8000 ppm and temperature drift errors are combined and further addressed electronically. A simple digital compensation circuitry generates a compensation word as an input to 21 bit MASH 1 -1-1 sigma delta modulator incorporated in RF LTE fractional N-PLL for frequency compensation. Temperature is sensed using low power BJT band-gap front end circuitry with 12 bit temperature to digital converter characterized by a resolution of 0.075˚C. The smart temperature sensor consumes only 4.6 μA. 700 MHz band LTE signal proved to have the stringent phase noise and frequency resolution specifications among all LTE bands. For this band, the achieved jitter value is 1.29 ps and the output frequency stability is 0.5 ppm over temperature ranges from -40˚C to 85˚C. The system is built on 32nm CMOS technology using 1.8V IO device

Lithium niobate RF-MEMS oscillators for IoT, 5G and beyond

This dissertation focuses on the design and implementation of lithium niobate (LiNbO3) radiofrequency microelectromechanical (RF-MEMS) oscillators for internet-of-things (IoT), 5G and beyond. The dissertation focuses on solving two main problems found nowadays in most of the published works: the narrow tuning range and the low operating frequency (sub 3 GHz) acoustic oscillators currently deliver. The work introduced here enables wideband voltage-controlled MEMS oscillators (VCMOs) needed for emerging applications in IoT. Moreover, it enables multi-GHz (above 8 GHz) RF-MEMS oscillators through harnessing over mode resonances for 5G and beyond. LiNbO3 resonators characterized by high-quality factor (Q), high electromechanical coupling (kt2), and high figure-of-merit (FoMRES= Q kt2) are crucial for building the envisioned high-performance oscillators. Those oscillators can be enabled with lower power consumption, wider tuning ranges, and a higher frequency of oscillation when compared to other state-of-the-art (SoA) RF-MEMS oscillators. Tackling the tuning range issue, the first VCMO based on the heterogeneous integration of a high Q LiNbO3 RF-MEMS resonator and complementary metal-oxide semiconductor (CMOS) is demonstrated in this dissertation. A LiNbO3 resonator array with a series resonance of 171.1 MHz, a Q of 410, and a kt2 of 12.7% is adopted, while the TSMC 65 nm RF LP CMOS technology is used to implement the active circuitry with an active area of 220×70 µm2. Frequency tuning of the VCMO is achieved by programming a binary-weighted digital capacitor bank and a varactor that are both connected in series to the resonator. The measured best phase noise performances of the VCMO are -72 and -153 dBc/Hz at 1 kHz and 10 MHz offsets from 178.23 and 175.83 MHz carriers, respectively. The VCMO consumes a direct current (DC) of 60 µA from a 1.2 V supply while realizing a tuning range of 2.4 MHz (~ 1.4% tuning range). Such VCMOs can be applied to enable ultralow-power, low phase noise, and wideband RF synthesis for emerging applications in IoT. Moreover, the first VCMO based on LiNbO3 lateral overtone bulk acoustic resonator (LOBAR) is demonstrated in this dissertation. The LOBAR excites over 30 resonant modes in the range of 100 to 800 MHz with a frequency spacing of 20 MHz. The VCMO consists of a LOBAR in a closed-loop with two amplification stages and a varactor-embedded tunable LC tank. By the bias voltage applied to the varactor, the tank can be tuned to change the closed-loop gain and phase responses of the oscillator so that Barkhausen’s conditions are satisfied for the targeted resonant mode. The tank is designed to allow the proposed VCMO to lock to any of the ten overtones ranging from 300 to 500 MHz. These ten tones are characterized by average Qs of 2100, kt2 of 1.5%, FoMRES of 31.5 enabling low phase noise, and low-power oscillators crucial for IoT. Owing to the high Qs of the LiNbO3 LOBAR, the measured VCMO shows a close-in phase noise of -100 dBc/Hz at 1 kHz offset from a 300 MHz carrier and a noise floor of -153 dBc/Hz while consuming 9 mW. With further optimization, this VCMO can lead to direct RF synthesis for ultra-low-power transceivers in multi-mode IoT nodes. Tackling the multi-GHz operation problem, the first Ku-band RF-MEMS oscillator utilizing a third antisymmetric overtone (A3) in a LiNbO3 resonator is presented in the dissertation. Quarter-wave resonators are used to satisfy Barkhausen’s oscillation conditions for the 3rd overtone while suppressing the fundamental and higher-order resonances. The oscillator achieves measured phase noise of -70 and -111 dBc/Hz at 1 kHz and 100 kHz offsets from a 12.9 GHz carrier while consuming 20 mW of dc power. The oscillator achieves a FoMOSC of 200 dB at 100 kHz offset. The achieved oscillation frequency is the highest reported to date for a MEMS oscillator. In addition, this dissertation introduces the first X-band RF-MEMS oscillator built using CMOS technology. The oscillator consists of an acoustic resonator in a closed loop with cascaded RF tuned amplifiers (TAs) built on TSMC RF GP 65 nm CMOS. The TAs bandpass response, set by on-chip inductors, satisfies Barkhausen's oscillation conditions for A3 only. Two circuit variations are implemented. The first is an 8.6 GHz standalone oscillator with a source-follower buffer for direct 50 Ω-based measurements. The second is an oscillator-divider chain using an on-chip 3-stage divide-by-2 frequency divider for a ~1.1 GHz output. The standalone oscillator achieves measured phase noise of -56, -113, and -135 dBc/Hz at 1 kHz, 100 kHz, and 1 MHz offsets from an 8.6 GHz output while consuming 10.2 mW of dc power. The oscillator also attains a FoMOSC of 201.6 dB at 100 kHz offset, surpassing the SoA electromagnetic (EM) and RF-MEMS based oscillators. The oscillator-divider chain produces a phase noise of -69.4 and -147 dBc/Hz at 1 kHz and 1 MHz offsets from a 1075 MHz output while consuming 12 mW of dc power. Its phase noise performance also surpasses the SoA L-band phase-locked loops (PLLs). The demonstrated performance shows the strong potential of microwave acoustic oscillators for 5G frequency synthesis and beyond. This work will enable low-power 5G transceivers featuring high speed, high sensitivity, and high selectivity in small form factors

Platform-based design, test and fast verification flow for mixed-signal systems on chip

This research is providing methodologies to enhance the design phase from architectural space exploration and system study to verification of the whole mixed-signal system. At the beginning of the work, some innovative digital IPs have been designed to develop efficient signal conditioning for sensor systems on-chip that has been included in commercial products. After this phase, the main focus has been addressed to the creation of a re-usable and versatile test of the device after the tape-out which is close to become one of the major cost factor for ICs companies, strongly linking it to model’s test-benches to avoid re-design phases and multi-environment scenarios, producing a very effective approach to a single, fast and reliable multi-level verification environment. All these works generated different publications in scientific literature. The compound scenario concerning the development of sensor systems is presented in Chapter 1, together with an overview of the related market with a particular focus on the latest MEMS and MOEMS technology devices, and their applications in various segments. Chapter 2 introduces the state of the art for sensor interfaces: the generic sensor interface concept (based on sharing the same electronics among similar applications achieving cost saving at the expense of area and performance loss) versus the Platform Based Design methodology, which overcomes the drawbacks of the classic solution by keeping the generality at the highest design layers and customizing the platform for a target sensor achieving optimized performances. An evolution of Platform Based Design achieved by implementation into silicon of the ISIF (Intelligent Sensor InterFace) platform is therefore presented. ISIF is a highly configurable mixed-signal chip which allows designers to perform an effective design space exploration and to evaluate directly on silicon the system performances avoiding the critical and time consuming analysis required by standard platform based approach. In chapter 3 we describe the design of a smart sensor interface for conditioning next generation MOEMS. The adoption of a new, high performance and high integrated technology allow us to integrate not only a versatile platform but also a powerful ARM processor and various IPs providing the possibility to use the platform not only as a conditioning platform but also as a processing unit for the application. In this chapter a description of the various blocks is given, with a particular emphasis on the IP developed in order to grant the highest grade of flexibility with the minimum area occupation. The architectural space evaluation and the application prototyping with ISIF has enabled an effective, rapid and low risk development of a new high performance platform achieving a flexible sensor system for MEMS and MOEMS monitoring and conditioning. The platform has been design to cover very challenging test-benches, like a laser-based projector device. In this way the platform will not only be able to effectively handle the sensor but also all the system that can be built around it, reducing the needed for further electronics and resulting in an efficient test bench for the algorithm developed to drive the system. The high costs in ASIC development are mainly related to re-design phases because of missing complete top-level tests. Analog and digital parts design flows are separately verified. Starting from these considerations, in the last chapter a complete test environment for complex mixed-signal chips is presented. A semi-automatic VHDL-AMS flow to provide totally matching top-level is described and then, an evolution for fast self-checking test development for both model and real chip verification is proposed. By the introduction of a Python interface, the designer can easily perform interactive tests to cover all the features verification (e.g. calibration and trimming) into the design phase and check them all with the same environment on the real chip after the tape-out. This strategy has been tested on a consumer 3D-gyro for consumer application, in collaboration with SensorDynamics AG

Microelectromechanical Systems for Wireless Radio Front-ends and Integrated Frequency References.

Microelectromechanical systems (MEMS) have great potential in realizing chip-scale integrated devices for energy-efficient analog spectrum processing. This thesis presents the development of a new class of MEMS resonators and filters integrated with CMOS readout circuits for RF front-ends and integrated timing applications. Circuit-level innovations coupled with new device designs allowed for realizing integrated systems with improved performance compared to standalone devices reported in the literature. The thesis is comprised of two major parts. The first part of the thesis is focused on developing integrated MEMS timing devices. Fused silica is explored as a new structural material for fabricating high-Q vibrating micromechanical resonators. A piezoelectric-on-silica MEMS resonator is demonstrated with a high Q of more than 20,000 and good electromechanical coupling. A low phase noise CMOS reference oscillator is implemented using the MEMS resonator as a mechanical frequency reference. Temperature-stable operation of the MEMS oscillator is realized by ovenizing the platform using an integrated heater. In an alternative scheme, the intrinsic temperature sensitivity of MEMS resonators is utilized for temperature sensing, and active compensation for MEMS oscillators is realized by oven-control using a phase-locked loop (PLL). CMOS circuits are implemented for realizing the PLL-based low-power oven-control system. The active compensation technique realizes a MEMS oscillator with an overall frequency drift within +/- 4 ppm across -40 to 70 °C, without the need for calibration. The CMOS PLL circuits for oven-control is demonstrated with near-zero phase noise invasion on the MEMS oscillators. The properties of PLL-based compensation for realizing ultra-stable MEMS frequency references are studied. In the second part of the thesis, RF MEMS devices, including tunable capacitors, high-Q inductors, and ohmic switches, are fabricated using a surface micromachined integrated passive device (IPD) process. Using this process, an integrated ultra-wideband (UWB) filter has been demonstrated, showing low loss and a small form factor. To further address the issue of narrow in-band interferences in UWB communication, a tunable MEMS bandstop filter is integrated with the bandpass filter with more than an octave frequency tuning range. The bandstop filter can be optionally switched off by employing MEMS ohmic switches co-integrated on the same chip.PhDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/109069/1/zzwu_1.pd

Integrated Circuits for Programming Flash Memories in Portable Applications

Smart devices such as smart grids, smart home devices, etc. are infrastructure systems that connect the world around us more than before. These devices can communicate with each other and help us manage our environment. This concept is called the Internet of Things (IoT). Not many smart nodes exist that are both low-power and programmable. Floating-gate (FG) transistors could be used to create adaptive sensor nodes by providing programmable bias currents. FG transistors are mostly used in digital applications like Flash memories. However, FG transistors can be used in analog applications, too. Unfortunately, due to the expensive infrastructure required for programming these transistors, they have not been economical to be used in portable applications. In this work, we present low-power approaches to programming FG transistors which make them a good candidate to be employed in future wireless sensor nodes and portable systems. First, we focus on the design of low-power circuits which can be used in programming the FG transistors such as high-voltage charge pumps, low-drop-out regulators, and voltage reference cells. Then, to achieve the goal of reducing the power consumption in programmable sensor nodes and reducing the programming infrastructure, we present a method to program FG transistors using negative voltages. We also present charge-pump structures to generate the necessary negative voltages for programming in this new configuration

Power Management ICs for Internet of Things, Energy Harvesting and Biomedical Devices

This dissertation focuses on the power management unit (PMU) and integrated circuits (ICs) for the internet of things (IoT), energy harvesting and biomedical devices. Three monolithic power harvesting methods are studied for different challenges of smart nodes of IoT networks. Firstly, we propose that an impedance tuning approach is implemented with a capacitor value modulation to eliminate the quiescent power consumption. Secondly, we develop a hill-climbing MPPT mechanism that reuses and processes the information of the hysteresis controller in the time-domain and is free of power hungry analog circuits. Furthermore, the typical power-performance tradeoff of the hysteresis controller is solved by a self-triggered one-shot mechanism. Thus, the output regulation achieves high-performance and yet low-power operations as low as 12 µW. Thirdly, we introduce a reconfigurable charge pump to provide the hybrid conversion ratios (CRs) as 1⅓× up to 8× for minimizing the charge redistribution loss. The reconfigurable feature also dynamically tunes to maximum power point tracking (MPPT) with the frequency modulation, resulting in a two-dimensional MPPT. Therefore, the voltage conversion efficiency (VCE) and the power conversion efficiency (PCE) are enhanced and flattened across a wide harvesting range as 0.45 to 3 V. In a conclusion, we successfully develop an energy harvesting method for the IoT smart nodes with lower cost, smaller size, higher conversion efficiency, and better applicability. For the biomedical devices, this dissertation presents a novel cost-effective automatic resonance tracking method with maximum power transfer (MPT) for piezoelectric transducers (PT). The proposed tracking method is based on a band-pass filter (BPF) oscillator, exploiting the PT’s intrinsic resonance point through a sensing bridge. It guarantees automatic resonance tracking and maximum electrical power converted into mechanical motion regardless of process variations and environmental interferences. Thus, the proposed BPF oscillator-based scheme was designed for an ultrasonic vessel sealing and dissecting (UVSD) system. The sealing and dissecting functions were verified experimentally in chicken tissue and glycerin. Furthermore, a combined sensing scheme circuit allows multiple surgical tissue debulking, vessel sealer and dissector (VSD) technologies to operate from the same sensing scheme board. Its advantage is that a single driver controller could be used for both systems simplifying the complexity and design cost. In a conclusion, we successfully develop an ultrasonic scalpel to replace the other electrosurgical counterparts and the conventional scalpels with lower cost and better functionality

Low-Power and Programmable Analog Circuitry for Wireless Sensors

Embedding networks of secure, wirelessly-connected sensors and actuators will help us to conscientiously manage our local and extended environments. One major challenge for this vision is to create networks of wireless sensor devices that provide maximal knowledge of their environment while using only the energy that is available within that environment. In this work, it is argued that the energy constraints in wireless sensor design are best addressed by incorporating analog signal processors. The low power-consumption of an analog signal processor allows persistent monitoring of multiple sensors while the device\u27s analog-to-digital converter, microcontroller, and transceiver are all in sleep mode. This dissertation describes the development of analog signal processing integrated circuits for wireless sensor networks. Specific technology problems that are addressed include reconfigurable processing architectures for low-power sensing applications, as well as the development of reprogrammable biasing for analog circuits

Low-Power and Programmable Analog Circuitry for Wireless Sensors

Embedding networks of secure, wirelessly-connected sensors and actuators will help us to conscientiously manage our local and extended environments. One major challenge for this vision is to create networks of wireless sensor devices that provide maximal knowledge of their environment while using only the energy that is available within that environment. In this work, it is argued that the energy constraints in wireless sensor design are best addressed by incorporating analog signal processors. The low power-consumption of an analog signal processor allows persistent monitoring of multiple sensors while the device\u27s analog-to-digital converter, microcontroller, and transceiver are all in sleep mode. This dissertation describes the development of analog signal processing integrated circuits for wireless sensor networks. Specific technology problems that are addressed include reconfigurable processing architectures for low-power sensing applications, as well as the development of reprogrammable biasing for analog circuits

MEMS piezoelectric vibrational energy harvesters and circuits for IoT applications

In the Internet of Things (IoT) world, more and more sensor nodes are being deployed and more mobile power sources are required. Alternative solutions to batteries are the subjects of worldwide extended research. Among the possibilities is the harvesting of energy from the ambient. A novel energy harvesting system to power wireless sensor nodes is a necessity and inevitable path, with more and more market interest. Microelectromechnaical systems (MEMS) based piezoelectric vibrational energy harvesters (PVEH) are considered in this thesis due to their good energy densities, conversion efficiency, suitability for miniaturization and CMOS integration. Cantilever beams are favored for their relatively high average strains, low frequencies and simplicity of fabrication. Proof masses are essential in micro scale devices in order to decrease the resonance frequency and increase the strain along the beam to increase the output power. In this thesis, the effects of proof mass geometry on piezoelectric vibration energy harvesters are studied. Different geometrical dimension ratios have significant impact on the resonance frequency, e.g., beam to mass lengths, and beam to mass widths. The responses of various prototypes are studied. Furthermore, the impact of geometry on the performance of cantilever-based PVEH is investigated. Namely, rectangular and trapezoidal T-shaped designs are fabricated and tested. Optimized cross-shaped geometries are fabricated using a commercial technology PiezoMUMPs process from MEMSCAP. They are characterized for their resonant frequency, strain distribution and output power. The output of an energy harvester is not directly suited as a power supply for circuits because of variations in its power and voltage over time, therefore a power management circuit is required. The circuit meets the requirements of responding to an input voltage that varies with the ambient conditions to generate a regulated output voltage, and the ability to power multiple outputs from a fixed input voltage. In this thesis, new design architectures for a reconfigurable circuit are considered. A charge pump which modifies dynamically the number of stages to generate a plurality of voltage levels has been designed and fabricated using a CMOS 0.13 μm technology. This provides biasing voltages for electrostatic MEMS devices. Electrostatic MEMS require relatively high and variable actuation voltages and the fabricated circuit serves this goal and attains a measured maximum output voltage of 10.1 V from a 1.2 V supply. In this thesis, design recommendations are given and MEMS piezoelectric harvesters are implemented and validated through fabrications. T-shaped harvesters bring improvements over cantilever designs, namely the trapezoidal T-shaped structures. A cross-shaped design has the advantage of utilizing four beams and the proposed proof mass improves the performance significantly. A cross-coupled circuit rectifies the output efficiently towards an optimal energy harvesting solution