Towards Porting Operating Systems with Program Synthesis

The end of Moore's Law has ushered in a diversity of hardware not seen in decades. Operating system (and system software) portability is accordingly becoming increasingly critical. Simultaneously, there has been tremendous progress in program synthesis. We set out to explore the feasibility of using modern program synthesis to generate the machine-dependent parts of an operating system. Our ultimate goal is to generate new ports automatically from descriptions of new machines. One of the issues involved is writing specifications, both for machine-dependent operating system functionality and for instruction set architectures. We designed two domain-specific languages: Alewife for machine-independent specifications of machine-dependent operating system functionality and Cassiopea for describing instruction set architecture semantics. Automated porting also requires an implementation. We developed a toolchain that, given an Alewife specification and a Cassiopea machine description, specializes the machine-independent specification to the target instruction set architecture and synthesizes an implementation in assembly language with a customized symbolic execution engine. Using this approach, we demonstrate successful synthesis of a total of 140 OS components from two pre-existing OSes for four real hardware platforms. We also developed several optimization methods for OS-related assembly synthesis to improve scalability. The effectiveness of our languages and ability to synthesize code for all 140 specifications is evidence of the feasibility of program synthesis for machine-dependent OS code. However, many research challenges remain; we also discuss the benefits and limitations of our synthesis-based approach to automated OS porting.Comment: ACM Transactions on Programming Languages and Systems. Accepted on August 202

Specifications and programs for computer software validation

Three software products developed during the study are reported and include: (1) FORTRAN Automatic Code Evaluation System, (2) the Specification Language System, and (3) the Array Index Validation System

Virtual Controllers

Small ARM Cortex CPU based system boards, called controllers, are used in building automation for regulation of heating, ventilation, and air conditioning. A controlling project can incorporate several thousands of these controllers. The controllers communicate with a SCADA system over the TCP/IP protocol. For the purpose of testing the Supervisory Control And Data Acquisition (SCADA) system when communicating with several hundred controllers simultaneously, a software implementation of a controller that can run in multiple instances, is needed. In this thesis, three different kinds of virtual controllers are proposed and evaluated for their performance. The performance data is based on controller’s response time and is acquired in a benchmark tool that is simulating SCADA. The implementation work consisted of designing and implementing a benchmark tool and three controller solutions: emulated, ported and simulated. The three solutions differ significantly in the number of instances that can be run simultaneously on the same machine. The conclusion is that the simulated solution is the most suitable since it can run in 6000 instances contra the ported with 200 instances. The emulated solution was eventually deemed as impractical to accomplish in the scope of this thesis

Acceleration and semantic foundations of embedded Java platforms

Tableau d'honneur de la Faculté des études supérieures et postdoctorales, 2006-200